| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| # Copyright 2020 thingy.jp. |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: MStar/SigmaStar Armv7 SoC SMP control registers |
| |
| maintainers: |
| - Daniel Palmer <daniel@thingy.jp> |
| |
| description: | |
| MStar/SigmaStar's Armv7 SoCs that have more than one processor |
| have a region of registers that allow setting the boot address |
| and a magic number that allows secondary processors to leave |
| the loop they are parked in by the boot ROM. |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - sstar,ssd201-smpctrl # SSD201/SSD202D |
| - const: mstar,smpctrl |
| |
| reg: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| smpctrl@204000 { |
| compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; |
| reg = <0x204000 0x200>; |
| }; |