Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Trace, Profiling and Diagnostics Monitor - TPDM

description: |
  The TPDM or Monitor serves as data collection component for various dataset
  types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
  Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
  Single Bit (DSB). It performs data collection in the data producing clock
  domain and transfers it to the data collection time domain, generally ATB
  clock domain.

  The primary use case of the TPDM is to collect data from different data
  sources and send it to a TPDA for packetization, timestamping, and funneling.

maintainers:
  - Mao Jinlong <quic_jinlmao@quicinc.com>
  - Tao Zhang <quic_taozha@quicinc.com>

# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
  properties:
    compatible:
      contains:
        enum:
          - qcom,coresight-tpdm
  required:
    - compatible

properties:
  $nodename:
    pattern: "^tpdm(@[0-9a-f]+)$"
  compatible:
    items:
      - const: qcom,coresight-tpdm
      - const: arm,primecell

  reg:
    minItems: 1
    maxItems: 2

  qcom,dsb-element-bits:
    description:
      Specifies the DSB(Discrete Single Bit) element size supported by
      the monitor. The associated aggregator will read this size before it
      is enabled. DSB element size currently only supports 32-bit and 64-bit.
    enum: [32, 64]

  qcom,cmb-element-bits:
    description:
      Specifies the CMB(Continuous Multi-Bit) element size supported by
      the monitor. The associated aggregator will read this size before it
      is enabled. CMB element size currently only supports 8-bit, 32-bit
      and 64-bit.
    enum: [8, 32, 64]

  qcom,dsb-msrs-num:
    description:
      Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
      registers supported by the monitor. If this property is not configured
      or set to 0, it means this DSB TPDM doesn't support MSR.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 32

  qcom,cmb-msrs-num:
    description:
      Specifies the number of CMB MSR(mux select register) registers supported
      by the monitor. If this property is not configured or set to 0, it means
      this TPDM doesn't support CMB MSR.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 32

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: apb_pclk

  out-ports:
    description: |
      Output connections from the TPDM to coresight funnel/TPDA.
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port:
        description: Output connection from the TPDM to coresight
            funnel/TPDA.
        $ref: /schemas/graph.yaml#/properties/port

required:
  - compatible
  - reg
  - clocks
  - clock-names

additionalProperties: false

examples:
  # minimum TPDM definition. TPDM connect to coresight TPDA.
  - |
    tpdm@684c000 {
      compatible = "qcom,coresight-tpdm", "arm,primecell";
      reg = <0x0684c000 0x1000>;

      qcom,dsb-element-bits = <32>;
      qcom,dsb-msrs-num = <16>;

      clocks = <&aoss_qmp>;
      clock-names = "apb_pclk";

      out-ports {
        port {
          tpdm_prng_out_tpda_qdss: endpoint {
            remote-endpoint =
              <&tpda_qdss_in_tpdm_prng>;
          };
        };
      };
    };

    tpdm@6c29000 {
      compatible = "qcom,coresight-tpdm", "arm,primecell";
      reg = <0x06c29000 0x1000>;

      qcom,cmb-element-bits = <64>;
      qcom,cmb-msrs-num = <32>;

      clocks = <&aoss_qmp>;
      clock-names = "apb_pclk";

      out-ports {
        port {
          tpdm_ipcc_out_funnel_center: endpoint {
            remote-endpoint = <&funnel_center_in_tpdm_ipcc>;
          };
        };
      };
    };
...