Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip designware mobile storage host controller

description:
  Rockchip uses the Synopsys designware mobile storage host controller
  to interface a SoC with storage medium such as eMMC or SD/MMC cards.
  This file documents the combined properties for the core Synopsys dw mshc
  controller that are not already included in the synopsys-dw-mshc-common.yaml
  file and the Rockchip specific extensions.

allOf:
  - $ref: synopsys-dw-mshc-common.yaml#

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

# Everything else is described in the common file
properties:
  compatible:
    oneOf:
      # for Rockchip RK2928 and before RK3288
      - const: rockchip,rk2928-dw-mshc
      # for Rockchip RK3288
      - const: rockchip,rk3288-dw-mshc
      - items:
          - enum:
              - rockchip,px30-dw-mshc
              - rockchip,rk1808-dw-mshc
              - rockchip,rk3036-dw-mshc
              - rockchip,rk3128-dw-mshc
              - rockchip,rk3228-dw-mshc
              - rockchip,rk3308-dw-mshc
              - rockchip,rk3328-dw-mshc
              - rockchip,rk3368-dw-mshc
              - rockchip,rk3399-dw-mshc
              - rockchip,rk3568-dw-mshc
              - rockchip,rk3588-dw-mshc
              - rockchip,rv1108-dw-mshc
              - rockchip,rv1126-dw-mshc
          - const: rockchip,rk3288-dw-mshc
      # for Rockchip RK3576 with phase tuning inside the controller
      - const: rockchip,rk3576-dw-mshc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 4
    description:
      Handle to "biu" and "ciu" clocks for the bus interface unit clock and
      the card interface unit clock. If "ciu-drive" and "ciu-sample" are
      specified in clock-names, it should also contain
      handles to these clocks.

  clock-names:
    minItems: 2
    items:
      - const: biu
      - const: ciu
      - const: ciu-drive
      - const: ciu-sample
    description:
      Apart from the clock-names "biu" and "ciu" two more clocks
      "ciu-drive" and "ciu-sample" are supported. They are used
      to control the clock phases, "ciu-sample" is required for tuning
      high speed modes.

  power-domains:
    maxItems: 1

  rockchip,default-sample-phase:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 360
    default: 0
    description:
      The default phase to set "ciu-sample" at probing,
      low speeds or in case where all phases work at tuning time.
      If not specified 0 deg will be used.

  rockchip,desired-num-phases:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 360
    default: 360
    description:
      The desired number of times that the host execute tuning when needed.
      If not specified, the host will do tuning for 360 times,
      namely tuning for each degree.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3288-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    sdmmc: mmc@ff0c0000 {
      compatible = "rockchip,rk3288-dw-mshc";
      reg = <0xff0c0000 0x4000>;
      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
               <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
      clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
      resets = <&cru SRST_MMC0>;
      reset-names = "reset";
      fifo-depth = <0x100>;
      max-frequency = <150000000>;
    };

...