| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/mtd/ti,gpmc-onenand.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: OneNAND over Texas Instruments GPMC bus. |
| |
| maintainers: |
| - Tony Lindgren <tony@atomide.com> |
| - Roger Quadros <rogerq@kernel.org> |
| |
| description: |
| GPMC connected OneNAND (found on OMAP boards) are represented |
| as child nodes of the GPMC controller. |
| |
| properties: |
| $nodename: |
| pattern: "^onenand@[0-9],[0,9]$" |
| |
| compatible: |
| const: ti,omap2-onenand |
| |
| reg: |
| items: |
| - description: | |
| Chip Select number, register offset and size of |
| OneNAND register window. |
| |
| "#address-cells": true |
| |
| "#size-cells": true |
| |
| int-gpios: |
| description: GPIO specifier for the INT pin. |
| |
| patternProperties: |
| "@[0-9a-f]+$": |
| $ref: /schemas/mtd/partitions/partition.yaml |
| |
| allOf: |
| - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml |
| |
| required: |
| - compatible |
| - reg |
| - "#address-cells" |
| - "#size-cells" |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| gpmc: memory-controller@6e000000 { |
| compatible = "ti,omap3430-gpmc"; |
| reg = <0x6e000000 0x02d0>; |
| interrupts = <20>; |
| gpmc,num-cs = <8>; |
| gpmc,num-waitpins = <4>; |
| clocks = <&l3s_clkctrl>; |
| clock-names = "fck"; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| |
| ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */ |
| <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */ |
| |
| onenand@0,0 { |
| compatible = "ti,omap2-onenand"; |
| reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "bootloader"; |
| reg = <0x00000000 0x00100000>; |
| }; |
| |
| partition@100000 { |
| label = "config"; |
| reg = <0x00100000 0x002c0000>; |
| }; |
| }; |
| }; |