| /* |
| * r8a7790 processor support |
| * |
| * Copyright (C) 2013 Renesas Solutions Corp. |
| * Copyright (C) 2013 Magnus Damm |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| */ |
| |
| #include <linux/irq.h> |
| #include <linux/kernel.h> |
| #include <linux/of_platform.h> |
| #include <linux/serial_sci.h> |
| #include <linux/platform_data/gpio-rcar.h> |
| #include <linux/platform_data/irq-renesas-irqc.h> |
| #include <mach/common.h> |
| #include <mach/irqs.h> |
| #include <mach/r8a7790.h> |
| #include <asm/mach/arch.h> |
| |
| static struct resource pfc_resources[] __initdata = { |
| DEFINE_RES_MEM(0xe6060000, 0x250), |
| }; |
| |
| #define R8A7790_GPIO(idx) \ |
| static struct resource r8a7790_gpio##idx##_resources[] __initdata = { \ |
| DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \ |
| DEFINE_RES_IRQ(gic_spi(4 + (idx))), \ |
| }; \ |
| \ |
| static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = { \ |
| .gpio_base = 32 * (idx), \ |
| .irq_base = 0, \ |
| .number_of_pins = 32, \ |
| .pctl_name = "pfc-r8a7790", \ |
| .has_both_edge_trigger = 1, \ |
| }; \ |
| |
| R8A7790_GPIO(0); |
| R8A7790_GPIO(1); |
| R8A7790_GPIO(2); |
| R8A7790_GPIO(3); |
| R8A7790_GPIO(4); |
| R8A7790_GPIO(5); |
| |
| #define r8a7790_register_gpio(idx) \ |
| platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \ |
| r8a7790_gpio##idx##_resources, \ |
| ARRAY_SIZE(r8a7790_gpio##idx##_resources), \ |
| &r8a7790_gpio##idx##_platform_data, \ |
| sizeof(r8a7790_gpio##idx##_platform_data)) |
| |
| void __init r8a7790_pinmux_init(void) |
| { |
| platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, |
| ARRAY_SIZE(pfc_resources)); |
| r8a7790_register_gpio(0); |
| r8a7790_register_gpio(1); |
| r8a7790_register_gpio(2); |
| r8a7790_register_gpio(3); |
| r8a7790_register_gpio(4); |
| r8a7790_register_gpio(5); |
| } |
| |
| #define SCIF_COMMON(scif_type, baseaddr, irq) \ |
| .type = scif_type, \ |
| .mapbase = baseaddr, \ |
| .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ |
| .irqs = SCIx_IRQ_MUXED(irq) |
| |
| #define SCIFA_DATA(index, baseaddr, irq) \ |
| [index] = { \ |
| SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \ |
| .scbrr_algo_id = SCBRR_ALGO_4, \ |
| .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ |
| } |
| |
| #define SCIFB_DATA(index, baseaddr, irq) \ |
| [index] = { \ |
| SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \ |
| .scbrr_algo_id = SCBRR_ALGO_4, \ |
| .scscr = SCSCR_RE | SCSCR_TE, \ |
| } |
| |
| #define SCIF_DATA(index, baseaddr, irq) \ |
| [index] = { \ |
| SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ |
| .scbrr_algo_id = SCBRR_ALGO_2, \ |
| .scscr = SCSCR_RE | SCSCR_TE, \ |
| } |
| |
| #define HSCIF_DATA(index, baseaddr, irq) \ |
| [index] = { \ |
| SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \ |
| .scbrr_algo_id = SCBRR_ALGO_6, \ |
| .scscr = SCSCR_RE | SCSCR_TE, \ |
| } |
| |
| enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1, |
| HSCIF0, HSCIF1 }; |
| |
| static struct plat_sci_port scif[] __initdata = { |
| SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ |
| SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */ |
| SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */ |
| SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */ |
| SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */ |
| SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ |
| SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ |
| SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ |
| HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */ |
| HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */ |
| }; |
| |
| static inline void r8a7790_register_scif(int idx) |
| { |
| platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], |
| sizeof(struct plat_sci_port)); |
| } |
| |
| static struct renesas_irqc_config irqc0_data __initdata = { |
| .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ |
| }; |
| |
| static struct resource irqc0_resources[] __initdata = { |
| DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */ |
| DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */ |
| DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */ |
| DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */ |
| DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */ |
| }; |
| |
| #define r8a7790_register_irqc(idx) \ |
| platform_device_register_resndata(&platform_bus, "renesas_irqc", \ |
| idx, irqc##idx##_resources, \ |
| ARRAY_SIZE(irqc##idx##_resources), \ |
| &irqc##idx##_data, \ |
| sizeof(struct renesas_irqc_config)) |
| |
| void __init r8a7790_add_standard_devices(void) |
| { |
| r8a7790_register_scif(SCIFA0); |
| r8a7790_register_scif(SCIFA1); |
| r8a7790_register_scif(SCIFB0); |
| r8a7790_register_scif(SCIFB1); |
| r8a7790_register_scif(SCIFB2); |
| r8a7790_register_scif(SCIFA2); |
| r8a7790_register_scif(SCIF0); |
| r8a7790_register_scif(SCIF1); |
| r8a7790_register_scif(HSCIF0); |
| r8a7790_register_scif(HSCIF1); |
| r8a7790_register_irqc(0); |
| } |
| |
| void __init r8a7790_timer_init(void) |
| { |
| void __iomem *cntcr; |
| |
| /* make sure arch timer is started by setting bit 0 of CNTCT */ |
| cntcr = ioremap(0xe6080000, PAGE_SIZE); |
| iowrite32(1, cntcr); |
| iounmap(cntcr); |
| |
| shmobile_timer_init(); |
| } |
| |
| #ifdef CONFIG_USE_OF |
| |
| static const char *r8a7790_boards_compat_dt[] __initdata = { |
| "renesas,r8a7790", |
| NULL, |
| }; |
| |
| DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") |
| .init_time = r8a7790_timer_init, |
| .dt_compat = r8a7790_boards_compat_dt, |
| MACHINE_END |
| #endif /* CONFIG_USE_OF */ |