| /* |
| * MPC8560 ADS Device Tree Source |
| * |
| * Copyright 2006 Freescale Semiconductor Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms of the GNU General Public License as published by the |
| * Free Software Foundation; either version 2 of the License, or (at your |
| * option) any later version. |
| */ |
| |
| |
| / { |
| model = "MPC8560ADS"; |
| compatible = "MPC8560ADS", "MPC85xxADS"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| aliases { |
| ethernet0 = &enet0; |
| ethernet1 = &enet1; |
| ethernet2 = &enet2; |
| ethernet3 = &enet3; |
| serial0 = &serial0; |
| serial1 = &serial1; |
| pci0 = &pci0; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| PowerPC,8560@0 { |
| device_type = "cpu"; |
| reg = <0>; |
| d-cache-line-size = <20>; // 32 bytes |
| i-cache-line-size = <20>; // 32 bytes |
| d-cache-size = <8000>; // L1, 32K |
| i-cache-size = <8000>; // L1, 32K |
| timebase-frequency = <04ead9a0>; |
| bus-frequency = <13ab6680>; |
| clock-frequency = <312c8040>; |
| }; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <00000000 10000000>; |
| }; |
| |
| soc8560@e0000000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| device_type = "soc"; |
| ranges = <0 e0000000 00100000>; |
| reg = <e0000000 00000200>; |
| bus-frequency = <13ab6680>; |
| |
| memory-controller@2000 { |
| compatible = "fsl,8540-memory-controller"; |
| reg = <2000 1000>; |
| interrupt-parent = <&mpic>; |
| interrupts = <12 2>; |
| }; |
| |
| l2-cache-controller@20000 { |
| compatible = "fsl,8540-l2-cache-controller"; |
| reg = <20000 1000>; |
| cache-line-size = <20>; // 32 bytes |
| cache-size = <40000>; // L2, 256K |
| interrupt-parent = <&mpic>; |
| interrupts = <10 2>; |
| }; |
| |
| mdio@24520 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,gianfar-mdio"; |
| reg = <24520 20>; |
| |
| phy0: ethernet-phy@0 { |
| interrupt-parent = <&mpic>; |
| interrupts = <5 1>; |
| reg = <0>; |
| device_type = "ethernet-phy"; |
| }; |
| phy1: ethernet-phy@1 { |
| interrupt-parent = <&mpic>; |
| interrupts = <5 1>; |
| reg = <1>; |
| device_type = "ethernet-phy"; |
| }; |
| phy2: ethernet-phy@2 { |
| interrupt-parent = <&mpic>; |
| interrupts = <7 1>; |
| reg = <2>; |
| device_type = "ethernet-phy"; |
| }; |
| phy3: ethernet-phy@3 { |
| interrupt-parent = <&mpic>; |
| interrupts = <7 1>; |
| reg = <3>; |
| device_type = "ethernet-phy"; |
| }; |
| }; |
| |
| enet0: ethernet@24000 { |
| cell-index = <0>; |
| device_type = "network"; |
| model = "TSEC"; |
| compatible = "gianfar"; |
| reg = <24000 1000>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| interrupts = <1d 2 1e 2 22 2>; |
| interrupt-parent = <&mpic>; |
| phy-handle = <&phy0>; |
| }; |
| |
| enet1: ethernet@25000 { |
| cell-index = <1>; |
| device_type = "network"; |
| model = "TSEC"; |
| compatible = "gianfar"; |
| reg = <25000 1000>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| interrupts = <23 2 24 2 28 2>; |
| interrupt-parent = <&mpic>; |
| phy-handle = <&phy1>; |
| }; |
| |
| mpic: pic@40000 { |
| interrupt-controller; |
| #address-cells = <0>; |
| #interrupt-cells = <2>; |
| reg = <40000 40000>; |
| device_type = "open-pic"; |
| }; |
| |
| cpm@919c0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; |
| reg = <919c0 30>; |
| ranges; |
| |
| muram@80000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 80000 10000>; |
| |
| data@0 { |
| compatible = "fsl,cpm-muram-data"; |
| reg = <0 4000 9000 2000>; |
| }; |
| }; |
| |
| brg@919f0 { |
| compatible = "fsl,mpc8560-brg", |
| "fsl,cpm2-brg", |
| "fsl,cpm-brg"; |
| reg = <919f0 10 915f0 10>; |
| clock-frequency = <d#165000000>; |
| }; |
| |
| cpmpic: pic@90c00 { |
| interrupt-controller; |
| #address-cells = <0>; |
| #interrupt-cells = <2>; |
| interrupts = <2e 2>; |
| interrupt-parent = <&mpic>; |
| reg = <90c00 80>; |
| compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; |
| }; |
| |
| serial0: serial@91a00 { |
| device_type = "serial"; |
| compatible = "fsl,mpc8560-scc-uart", |
| "fsl,cpm2-scc-uart"; |
| reg = <91a00 20 88000 100>; |
| fsl,cpm-brg = <1>; |
| fsl,cpm-command = <00800000>; |
| current-speed = <1c200>; |
| interrupts = <28 8>; |
| interrupt-parent = <&cpmpic>; |
| }; |
| |
| serial1: serial@91a20 { |
| device_type = "serial"; |
| compatible = "fsl,mpc8560-scc-uart", |
| "fsl,cpm2-scc-uart"; |
| reg = <91a20 20 88100 100>; |
| fsl,cpm-brg = <2>; |
| fsl,cpm-command = <04a00000>; |
| current-speed = <1c200>; |
| interrupts = <29 8>; |
| interrupt-parent = <&cpmpic>; |
| }; |
| |
| enet2: ethernet@91320 { |
| device_type = "network"; |
| compatible = "fsl,mpc8560-fcc-enet", |
| "fsl,cpm2-fcc-enet"; |
| reg = <91320 20 88500 100 913b0 1>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| fsl,cpm-command = <16200300>; |
| interrupts = <21 8>; |
| interrupt-parent = <&cpmpic>; |
| phy-handle = <&phy2>; |
| }; |
| |
| enet3: ethernet@91340 { |
| device_type = "network"; |
| compatible = "fsl,mpc8560-fcc-enet", |
| "fsl,cpm2-fcc-enet"; |
| reg = <91340 20 88600 100 913d0 1>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| fsl,cpm-command = <1a400300>; |
| interrupts = <22 8>; |
| interrupt-parent = <&cpmpic>; |
| phy-handle = <&phy3>; |
| }; |
| }; |
| }; |
| |
| pci0: pci@e0008000 { |
| cell-index = <0>; |
| #interrupt-cells = <1>; |
| #size-cells = <2>; |
| #address-cells = <3>; |
| compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; |
| device_type = "pci"; |
| reg = <e0008000 1000>; |
| clock-frequency = <3f940aa>; |
| interrupt-map-mask = <f800 0 0 7>; |
| interrupt-map = < |
| |
| /* IDSEL 0x2 */ |
| 1000 0 0 1 &mpic 1 1 |
| 1000 0 0 2 &mpic 2 1 |
| 1000 0 0 3 &mpic 3 1 |
| 1000 0 0 4 &mpic 4 1 |
| |
| /* IDSEL 0x3 */ |
| 1800 0 0 1 &mpic 4 1 |
| 1800 0 0 2 &mpic 1 1 |
| 1800 0 0 3 &mpic 2 1 |
| 1800 0 0 4 &mpic 3 1 |
| |
| /* IDSEL 0x4 */ |
| 2000 0 0 1 &mpic 3 1 |
| 2000 0 0 2 &mpic 4 1 |
| 2000 0 0 3 &mpic 1 1 |
| 2000 0 0 4 &mpic 2 1 |
| |
| /* IDSEL 0x5 */ |
| 2800 0 0 1 &mpic 2 1 |
| 2800 0 0 2 &mpic 3 1 |
| 2800 0 0 3 &mpic 4 1 |
| 2800 0 0 4 &mpic 1 1 |
| |
| /* IDSEL 12 */ |
| 6000 0 0 1 &mpic 1 1 |
| 6000 0 0 2 &mpic 2 1 |
| 6000 0 0 3 &mpic 3 1 |
| 6000 0 0 4 &mpic 4 1 |
| |
| /* IDSEL 13 */ |
| 6800 0 0 1 &mpic 4 1 |
| 6800 0 0 2 &mpic 1 1 |
| 6800 0 0 3 &mpic 2 1 |
| 6800 0 0 4 &mpic 3 1 |
| |
| /* IDSEL 14*/ |
| 7000 0 0 1 &mpic 3 1 |
| 7000 0 0 2 &mpic 4 1 |
| 7000 0 0 3 &mpic 1 1 |
| 7000 0 0 4 &mpic 2 1 |
| |
| /* IDSEL 15 */ |
| 7800 0 0 1 &mpic 2 1 |
| 7800 0 0 2 &mpic 3 1 |
| 7800 0 0 3 &mpic 4 1 |
| 7800 0 0 4 &mpic 1 1 |
| |
| /* IDSEL 18 */ |
| 9000 0 0 1 &mpic 1 1 |
| 9000 0 0 2 &mpic 2 1 |
| 9000 0 0 3 &mpic 3 1 |
| 9000 0 0 4 &mpic 4 1 |
| |
| /* IDSEL 19 */ |
| 9800 0 0 1 &mpic 4 1 |
| 9800 0 0 2 &mpic 1 1 |
| 9800 0 0 3 &mpic 2 1 |
| 9800 0 0 4 &mpic 3 1 |
| |
| /* IDSEL 20 */ |
| a000 0 0 1 &mpic 3 1 |
| a000 0 0 2 &mpic 4 1 |
| a000 0 0 3 &mpic 1 1 |
| a000 0 0 4 &mpic 2 1 |
| |
| /* IDSEL 21 */ |
| a800 0 0 1 &mpic 2 1 |
| a800 0 0 2 &mpic 3 1 |
| a800 0 0 3 &mpic 4 1 |
| a800 0 0 4 &mpic 1 1>; |
| |
| interrupt-parent = <&mpic>; |
| interrupts = <18 2>; |
| bus-range = <0 0>; |
| ranges = <02000000 0 80000000 80000000 0 20000000 |
| 01000000 0 00000000 e2000000 0 01000000>; |
| }; |
| }; |
