| - compatible: Should be set to one of the following: |
| - reg: The register base for the controller |
| - interrupts: The interrupt to map |
| - #address-cells: Set to <1> if the node includes partitions |
| - dmas: dma data channel, see dma.txt binding doc |
| - marvell,nand-enable-arbiter: Set to enable the bus arbiter |
| - marvell,nand-keep-config: Set to keep the NAND controller config as set |
| - num-cs: Number of chipselect lines to use |
| - nand-on-flash-bbt: boolean to enable on flash bbt option if |
| - nand-ecc-strength: number of bits to correct per ECC step |
| - nand-ecc-step-size: number of data bytes covered by a single ECC step |
| The following ECC strength and step size are currently supported: |
| - nand-ecc-strength = <1>, nand-ecc-step-size = <512> |
| - nand-ecc-strength = <4>, nand-ecc-step-size = <512> |
| - nand-ecc-strength = <8>, nand-ecc-step-size = <512> |
| compatible = "marvell,pxa3xx-nand"; |
| marvell,nand-enable-arbiter; |
| marvell,nand-keep-config; |
| /* partitions (optional) */ |