| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* |
| * Copyright (C) 2015 Regents of the University of California |
| */ |
| |
| #ifndef _ASM_RISCV_ASM_H |
| #define _ASM_RISCV_ASM_H |
| |
| #ifdef __ASSEMBLY__ |
| #define __ASM_STR(x) x |
| #else |
| #define __ASM_STR(x) #x |
| #endif |
| |
| #if __riscv_xlen == 64 |
| #define __REG_SEL(a, b) __ASM_STR(a) |
| #elif __riscv_xlen == 32 |
| #define __REG_SEL(a, b) __ASM_STR(b) |
| #else |
| #error "Unexpected __riscv_xlen" |
| #endif |
| |
| #define REG_L __REG_SEL(ld, lw) |
| #define REG_S __REG_SEL(sd, sw) |
| #define REG_SC __REG_SEL(sc.d, sc.w) |
| #define REG_ASM __REG_SEL(.dword, .word) |
| #define SZREG __REG_SEL(8, 4) |
| #define LGREG __REG_SEL(3, 2) |
| |
| #if __SIZEOF_POINTER__ == 8 |
| #ifdef __ASSEMBLY__ |
| #define RISCV_PTR .dword |
| #define RISCV_SZPTR 8 |
| #define RISCV_LGPTR 3 |
| #else |
| #define RISCV_PTR ".dword" |
| #define RISCV_SZPTR "8" |
| #define RISCV_LGPTR "3" |
| #endif |
| #elif __SIZEOF_POINTER__ == 4 |
| #ifdef __ASSEMBLY__ |
| #define RISCV_PTR .word |
| #define RISCV_SZPTR 4 |
| #define RISCV_LGPTR 2 |
| #else |
| #define RISCV_PTR ".word" |
| #define RISCV_SZPTR "4" |
| #define RISCV_LGPTR "2" |
| #endif |
| #else |
| #error "Unexpected __SIZEOF_POINTER__" |
| #endif |
| |
| #if (__SIZEOF_INT__ == 4) |
| #define RISCV_INT __ASM_STR(.word) |
| #define RISCV_SZINT __ASM_STR(4) |
| #define RISCV_LGINT __ASM_STR(2) |
| #else |
| #error "Unexpected __SIZEOF_INT__" |
| #endif |
| |
| #if (__SIZEOF_SHORT__ == 2) |
| #define RISCV_SHORT __ASM_STR(.half) |
| #define RISCV_SZSHORT __ASM_STR(2) |
| #define RISCV_LGSHORT __ASM_STR(1) |
| #else |
| #error "Unexpected __SIZEOF_SHORT__" |
| #endif |
| |
| #ifdef __ASSEMBLY__ |
| |
| /* Common assembly source macros */ |
| |
| #ifdef CONFIG_XIP_KERNEL |
| .macro XIP_FIXUP_OFFSET reg |
| REG_L t0, _xip_fixup |
| add \reg, \reg, t0 |
| .endm |
| .macro XIP_FIXUP_FLASH_OFFSET reg |
| la t1, __data_loc |
| REG_L t1, _xip_phys_offset |
| sub \reg, \reg, t1 |
| add \reg, \reg, t0 |
| .endm |
| _xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET |
| _xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET |
| #else |
| .macro XIP_FIXUP_OFFSET reg |
| .endm |
| .macro XIP_FIXUP_FLASH_OFFSET reg |
| .endm |
| #endif /* CONFIG_XIP_KERNEL */ |
| |
| #endif /* __ASSEMBLY__ */ |
| |
| #endif /* _ASM_RISCV_ASM_H */ |