| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright 2013 Freescale Semiconductor, Inc. |
| * |
| * Author: Fabio Estevam <fabio.estevam@freescale.com> |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| |
| / { |
| chosen { |
| stdout-path = &uart1; |
| }; |
| |
| sound { |
| compatible = "fsl,imx6-wandboard-sgtl5000", |
| "fsl,imx-audio-sgtl5000"; |
| model = "imx6-wandboard-sgtl5000"; |
| ssi-controller = <&ssi1>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "MIC_IN", "Mic Jack", |
| "Mic Jack", "Mic Bias", |
| "Headphone Jack", "HP_OUT"; |
| mux-int-port = <1>; |
| mux-ext-port = <3>; |
| }; |
| |
| sound-spdif { |
| compatible = "fsl,imx-audio-spdif"; |
| model = "imx-spdif"; |
| spdif-controller = <&spdif>; |
| spdif-out; |
| }; |
| |
| reg_1p5v: regulator-1p5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "1P5V"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| }; |
| |
| reg_1p8v: regulator-1p8v { |
| compatible = "regulator-fixed"; |
| regulator-name = "1P8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| reg_2p8v: regulator-2p8v { |
| compatible = "regulator-fixed"; |
| regulator-name = "2P8V"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| }; |
| |
| reg_2p5v: regulator-2p5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "2P5V"; |
| regulator-min-microvolt = <2500000>; |
| regulator-max-microvolt = <2500000>; |
| regulator-always-on; |
| }; |
| |
| reg_3p3v: regulator-3p3v { |
| compatible = "regulator-fixed"; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_otg_vbus: regulator-usbotgvbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotgvbus>; |
| gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux>; |
| status = "okay"; |
| }; |
| |
| &hdmi { |
| ddc-i2c-bus = <&i2c1>; |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| pinctrl-1 = <&pinctrl_i2c1_gpio>; |
| scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| pinctrl-1 = <&pinctrl_i2c2_gpio>; |
| scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| status = "okay"; |
| |
| codec: sgtl5000@a { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mclk>; |
| compatible = "fsl,sgtl5000"; |
| reg = <0x0a>; |
| clocks = <&clks IMX6QDL_CLK_CKO>; |
| VDDA-supply = <®_2p5v>; |
| VDDIO-supply = <®_3p3v>; |
| lrclk-strength = <3>; |
| }; |
| |
| camera@3c { |
| compatible = "ovti,ov5645"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ov5645>; |
| reg = <0x3c>; |
| clocks = <&clks IMX6QDL_CLK_CKO2>; |
| clock-names = "xclk"; |
| clock-frequency = <24000000>; |
| vdddo-supply = <®_1p8v>; |
| vdda-supply = <®_2p8v>; |
| vddd-supply = <®_1p5v>; |
| enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
| reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; |
| |
| port { |
| ov5645_to_mipi_csi2: endpoint { |
| remote-endpoint = <&mipi_csi2_in>; |
| clock-lanes = <0>; |
| data-lanes = <1 2>; |
| }; |
| }; |
| }; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| |
| imx6qdl-wandboard { |
| |
| pinctrl_audmux: audmuxgrp { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
| MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 |
| MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 |
| MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
| MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c1_gpio: i2c1gpiogrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b0 |
| MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b0 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2_gpio: i2c2gpiogrp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b0 |
| MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b0 |
| >; |
| }; |
| |
| pinctrl_mclk: mclkgrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 |
| >; |
| }; |
| |
| pinctrl_ov5645: ov5645grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0 |
| MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 |
| MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_spdif: spdifgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart3: uart3grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 |
| MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 |
| >; |
| }; |
| |
| pinctrl_usbotgvbus: usbotgvbusgrp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 |
| MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 |
| MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 |
| MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 |
| MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 |
| MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| >; |
| }; |
| }; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii-id"; |
| phy-handle = <ðphy>; |
| phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| ethphy: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| }; |
| }; |
| |
| &mipi_csi { |
| status = "okay"; |
| |
| port@0 { |
| reg = <0>; |
| |
| mipi_csi2_in: endpoint { |
| remote-endpoint = <&ov5645_to_mipi_csi2>; |
| clock-lanes = <0>; |
| data-lanes = <1 2>; |
| }; |
| }; |
| }; |
| |
| &spdif { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spdif>; |
| status = "okay"; |
| }; |
| |
| &ssi1 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart3>; |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| dr_mode = "otg"; |
| status = "okay"; |
| }; |
| |
| &usdhc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc1>; |
| cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc3>; |
| cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
