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Hisilicon Hi6220 Mailbox Driver
Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
is unidirectional with a maximum message size of 8 words. I/O is
performed using register access (there is no DMA) and the cell
raises an interrupt when messages are received.
Mailbox Device Node:
Required properties:
- compatible: Shall be "hisilicon,hi6220-mbox"
- reg: Contains the mailbox register address range (base
address and length); the first item is for IPC
registers, the second item is shared buffer for
- #mbox-cells: Common mailbox binding property to identify the number
of cells required for the mailbox specifier. Must be 3.
<&phandle slot_id dst_irq ack_irq>
phandle: Label name of mailbox controller
slot_id: Slot id used either for TX or RX
dst_irq: IRQ identifier index number which used by MCU
ack_irq: IRQ identifier index number with generating a
TX/RX interrupt to application processor,
mailbox driver uses it to acknowledge interrupt
- interrupts: Contains the interrupt information for the mailbox
device. The format is dependent on which interrupt
controller the SoCs use.
Optional Properties:
- hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
use this flag to ask MCU to enable "automatic idle
flag" mode or IRQ generated mode to acknowledge a TX
mailbox: mailbox@f7510000 {
compatible = "hisilicon,hi6220-mbox";
reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
<0x0 0x06dff800 0x0 0x0800>; /* Mailbox */
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <3>;
Mailbox client
Required properties:
- compatible: Many (See the client docs).
- mboxes: Standard property to specify a Mailbox (See ./mailbox.txt)
Cells must match 'mbox-cells' (See Mailbox Device Node above).
Optional Properties:
- mbox-names: Name given to channels seen in the 'mboxes' property.
stub_clock: stub_clock {
compatible = "hisilicon,hi6220-stub-clk";
hisilicon,hi6220-clk-sram = <&sram>;
#clock-cells = <1>;
mbox-names = "mbox-tx", "mbox-rx";
mboxes = <&mailbox 1 0 11>, <&mailbox 0 1 10>;