| Mediatek apmixedsys controller |
| ============================== |
| |
| The Mediatek apmixedsys controller provides the PLLs to the system. |
| |
| Required Properties: |
| |
| - compatible: Should be one of: |
| - "mediatek,mt2701-apmixedsys" |
| - "mediatek,mt2712-apmixedsys", "syscon" |
| - "mediatek,mt6765-apmixedsys", "syscon" |
| - "mediatek,mt6779-apmixedsys", "syscon" |
| - "mediatek,mt6797-apmixedsys" |
| - "mediatek,mt7622-apmixedsys" |
| - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" |
| - "mediatek,mt7629-apmixedsys" |
| - "mediatek,mt8135-apmixedsys" |
| - "mediatek,mt8167-apmixedsys", "syscon" |
| - "mediatek,mt8173-apmixedsys" |
| - "mediatek,mt8183-apmixedsys", "syscon" |
| - "mediatek,mt8516-apmixedsys" |
| - #clock-cells: Must be 1 |
| |
| The apmixedsys controller uses the common clk binding from |
| Documentation/devicetree/bindings/clock/clock-bindings.txt |
| The available clocks are defined in dt-bindings/clock/mt*-clk.h. |
| |
| Example: |
| |
| apmixedsys: clock-controller@10209000 { |
| compatible = "mediatek,mt8173-apmixedsys"; |
| reg = <0 0x10209000 0 0x1000>; |
| #clock-cells = <1>; |
| }; |
