| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Samsung Exynos Auto v9 SoC clock controller |
| |
| maintainers: |
| - Chanho Park <chanho61.park@samsung.com> |
| - Chanwoo Choi <cw00.choi@samsung.com> |
| - Krzysztof Kozlowski <krzk@kernel.org> |
| - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| - Tomasz Figa <tomasz.figa@gmail.com> |
| |
| description: | |
| Exynos Auto v9 clock controller is comprised of several CMU units, generating |
| clocks for different domains. Those CMU units are modeled as separate device |
| tree nodes, and might depend on each other. Root clocks in that clock tree are |
| two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz). |
| The external OSCCLK must be defined as fixed-rate clock in dts. |
| |
| CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and |
| dividers; all other clocks of function blocks (other CMUs) are usually |
| derived from CMU_TOP. |
| |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All clocks available for usage |
| in clock consumer nodes are defined as preprocessor macros in |
| 'include/dt-bindings/clock/samsung,exynosautov9.h' header. |
| |
| properties: |
| compatible: |
| enum: |
| - samsung,exynosautov9-cmu-top |
| - samsung,exynosautov9-cmu-busmc |
| - samsung,exynosautov9-cmu-core |
| - samsung,exynosautov9-cmu-fsys2 |
| - samsung,exynosautov9-cmu-peric0 |
| - samsung,exynosautov9-cmu-peric1 |
| - samsung,exynosautov9-cmu-peris |
| |
| clocks: |
| minItems: 1 |
| maxItems: 5 |
| |
| clock-names: |
| minItems: 1 |
| maxItems: 5 |
| |
| "#clock-cells": |
| const: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| allOf: |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-top |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-busmc |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_BUSMC bus clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_busmc_bus |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-core |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_CORE bus clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_core_bus |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-fsys2 |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_FSYS2 bus clock (from CMU_TOP) |
| - description: UFS clock (from CMU_TOP) |
| - description: Ethernet clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_fsys2_bus |
| - const: dout_fsys2_clkcmu_ufs_embd |
| - const: dout_fsys2_clkcmu_ethernet |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-peric0 |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_PERIC0 bus clock (from CMU_TOP) |
| - description: PERIC0 IP clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_peric0_bus |
| - const: dout_clkcmu_peric0_ip |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-peric1 |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_PERIC1 bus clock (from CMU_TOP) |
| - description: PERIC1 IP clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_peric1_bus |
| - const: dout_clkcmu_peric1_ip |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynosautov9-cmu-peris |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_PERIS bus clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: dout_clkcmu_peris_bus |
| |
| required: |
| - compatible |
| - "#clock-cells" |
| - clocks |
| - clock-names |
| - reg |
| |
| additionalProperties: false |
| |
| examples: |
| # Clock controller node for CMU_FSYS2 |
| - | |
| #include <dt-bindings/clock/samsung,exynosautov9.h> |
| |
| cmu_fsys2: clock-controller@17c00000 { |
| compatible = "samsung,exynosautov9-cmu-fsys2"; |
| reg = <0x17c00000 0x8000>; |
| #clock-cells = <1>; |
| |
| clocks = <&xtcxo>, |
| <&cmu_top DOUT_CLKCMU_FSYS2_BUS>, |
| <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>, |
| <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>; |
| clock-names = "oscclk", |
| "dout_clkcmu_fsys2_bus", |
| "dout_fsys2_clkcmu_ufs_embd", |
| "dout_fsys2_clkcmu_ethernet"; |
| }; |
| |
| ... |