| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Tegra194 on chip generic hardware timestamping engine (HTE) |
| |
| maintainers: |
| - Dipen Patel <dipenp@nvidia.com> |
| |
| description: |
| Tegra SoC has two instances of generic hardware timestamping engines (GTE) |
| known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip |
| IRQ lines for the state change respectively, upon detection it will record |
| timestamp (taken from system counter) in its internal hardware FIFO. It has |
| a bitmap array arranged in 32bit slices where each bit represent signal/line |
| to enable or disable for the hardware timestamping. The GTE GPIO monitors |
| GPIO lines from the AON (always on) GPIO controller. |
| |
| properties: |
| compatible: |
| enum: |
| - nvidia,tegra194-gte-aon |
| - nvidia,tegra194-gte-lic |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| nvidia,int-threshold: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| HTE device generates its interrupt based on this u32 FIFO threshold |
| value. The recommended value is 1. |
| minimum: 1 |
| maximum: 256 |
| |
| nvidia,slices: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| HTE lines are arranged in 32 bit slice where each bit represents different |
| line/signal that it can enable/configure for the timestamp. It is u32 |
| property and depends on the HTE instance in the chip. The value 3 is for |
| GPIO GTE and 11 for IRQ GTE. |
| enum: [3, 11] |
| |
| '#timestamp-cells': |
| description: |
| This represents number of line id arguments as specified by the |
| consumers. For the GTE IRQ, this is IRQ number as mentioned in the |
| SoC technical reference manual. For the GTE GPIO, its value is same as |
| mentioned in the nvidia GPIO device tree binding document. |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - nvidia,slices |
| - "#timestamp-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| tegra_hte_aon: timestamp@c1e0000 { |
| compatible = "nvidia,tegra194-gte-aon"; |
| reg = <0xc1e0000 0x10000>; |
| interrupts = <0 13 0x4>; |
| nvidia,int-threshold = <1>; |
| nvidia,slices = <3>; |
| #timestamp-cells = <1>; |
| }; |
| |
| - | |
| tegra_hte_lic: timestamp@3aa0000 { |
| compatible = "nvidia,tegra194-gte-lic"; |
| reg = <0x3aa0000 0x10000>; |
| interrupts = <0 11 0x4>; |
| nvidia,int-threshold = <1>; |
| nvidia,slices = <11>; |
| #timestamp-cells = <1>; |
| }; |
| |
| ... |
