| // SPDX-License-Identifier: GPL-2.0 |
| /dts-v1/; |
| |
| #include <dt-bindings/input/input.h> |
| #include "tegra20.dtsi" |
| #include "tegra20-cpu-opp.dtsi" |
| #include "tegra20-cpu-opp-microvolt.dtsi" |
| |
| / { |
| model = "Toshiba AC100 / Dynabook AZ"; |
| compatible = "compal,paz00", "nvidia,tegra20"; |
| |
| aliases { |
| rtc0 = "/i2c@7000d000/tps6586x@34"; |
| rtc1 = "/rtc@7000e000"; |
| serial0 = &uarta; |
| serial1 = &uartc; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@0 { |
| reg = <0x00000000 0x20000000>; |
| }; |
| |
| host1x@50000000 { |
| dc@54200000 { |
| rgb { |
| status = "okay"; |
| |
| nvidia,panel = <&panel>; |
| }; |
| }; |
| |
| hdmi@54280000 { |
| status = "okay"; |
| |
| vdd-supply = <&hdmi_vdd_reg>; |
| pll-supply = <&hdmi_pll_reg>; |
| |
| nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
| GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| pinmux@70000014 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&state_default>; |
| |
| state_default: pinmux { |
| ata { |
| nvidia,pins = "ata", "atc", "atd", "ate", |
| "dap2", "gmb", "gmc", "gmd", "spia", |
| "spib", "spic", "spid", "spie"; |
| nvidia,function = "gmi"; |
| }; |
| atb { |
| nvidia,pins = "atb", "gma", "gme"; |
| nvidia,function = "sdio4"; |
| }; |
| cdev1 { |
| nvidia,pins = "cdev1"; |
| nvidia,function = "plla_out"; |
| }; |
| cdev2 { |
| nvidia,pins = "cdev2"; |
| nvidia,function = "pllp_out4"; |
| }; |
| crtp { |
| nvidia,pins = "crtp"; |
| nvidia,function = "crt"; |
| }; |
| csus { |
| nvidia,pins = "csus"; |
| nvidia,function = "pllc_out1"; |
| }; |
| dap1 { |
| nvidia,pins = "dap1"; |
| nvidia,function = "dap1"; |
| }; |
| dap3 { |
| nvidia,pins = "dap3"; |
| nvidia,function = "dap3"; |
| }; |
| dap4 { |
| nvidia,pins = "dap4"; |
| nvidia,function = "dap4"; |
| }; |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "i2c2"; |
| }; |
| dta { |
| nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| nvidia,function = "rsvd1"; |
| }; |
| dtf { |
| nvidia,pins = "dtf"; |
| nvidia,function = "i2c3"; |
| }; |
| gpu { |
| nvidia,pins = "gpu", "sdb", "sdd"; |
| nvidia,function = "pwm"; |
| }; |
| gpu7 { |
| nvidia,pins = "gpu7"; |
| nvidia,function = "rtck"; |
| }; |
| gpv { |
| nvidia,pins = "gpv", "slxa", "slxk"; |
| nvidia,function = "pcie"; |
| }; |
| hdint { |
| nvidia,pins = "hdint", "pta"; |
| nvidia,function = "hdmi"; |
| }; |
| i2cp { |
| nvidia,pins = "i2cp"; |
| nvidia,function = "i2cp"; |
| }; |
| irrx { |
| nvidia,pins = "irrx", "irtx"; |
| nvidia,function = "uarta"; |
| }; |
| kbca { |
| nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; |
| nvidia,function = "kbc"; |
| }; |
| kbcb { |
| nvidia,pins = "kbcb", "kbcd"; |
| nvidia,function = "sdio2"; |
| }; |
| lcsn { |
| nvidia,pins = "lcsn", "ld0", "ld1", "ld2", |
| "ld3", "ld4", "ld5", "ld6", "ld7", |
| "ld8", "ld9", "ld10", "ld11", "ld12", |
| "ld13", "ld14", "ld15", "ld16", "ld17", |
| "ldc", "ldi", "lhp0", "lhp1", "lhp2", |
| "lhs", "lm0", "lm1", "lpp", "lpw0", |
| "lpw1", "lpw2", "lsc0", "lsc1", "lsck", |
| "lsda", "lsdi", "lspi", "lvp0", "lvp1", |
| "lvs"; |
| nvidia,function = "displaya"; |
| }; |
| owc { |
| nvidia,pins = "owc"; |
| nvidia,function = "owr"; |
| }; |
| pmc { |
| nvidia,pins = "pmc"; |
| nvidia,function = "pwr_on"; |
| }; |
| rm { |
| nvidia,pins = "rm"; |
| nvidia,function = "i2c1"; |
| }; |
| sdc { |
| nvidia,pins = "sdc"; |
| nvidia,function = "twc"; |
| }; |
| sdio1 { |
| nvidia,pins = "sdio1"; |
| nvidia,function = "sdio1"; |
| }; |
| slxc { |
| nvidia,pins = "slxc", "slxd"; |
| nvidia,function = "spi4"; |
| }; |
| spdi { |
| nvidia,pins = "spdi", "spdo"; |
| nvidia,function = "rsvd2"; |
| }; |
| spif { |
| nvidia,pins = "spif", "uac"; |
| nvidia,function = "rsvd4"; |
| }; |
| spig { |
| nvidia,pins = "spig", "spih"; |
| nvidia,function = "spi2_alt"; |
| }; |
| uaa { |
| nvidia,pins = "uaa", "uab", "uda"; |
| nvidia,function = "ulpi"; |
| }; |
| uad { |
| nvidia,pins = "uad"; |
| nvidia,function = "spdif"; |
| }; |
| uca { |
| nvidia,pins = "uca", "ucb"; |
| nvidia,function = "uartc"; |
| }; |
| conf_ata { |
| nvidia,pins = "ata", "atb", "atc", "atd", "ate", |
| "cdev1", "cdev2", "dap1", "dap2", "dtf", |
| "gma", "gmb", "gmc", "gmd", "gme", |
| "gpu", "gpu7", "gpv", "i2cp", "pta", |
| "rm", "sdio1", "slxk", "spdo", "uac", |
| "uda"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_ck32 { |
| nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| }; |
| conf_crtp { |
| nvidia,pins = "crtp", "dap3", "dap4", "dtb", |
| "dtc", "dte", "slxa", "slxc", "slxd", |
| "spdi"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_csus { |
| nvidia,pins = "csus", "spia", "spib", "spid", |
| "spif"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_ddc { |
| nvidia,pins = "ddc", "irrx", "irtx", "kbca", |
| "kbcb", "kbcc", "kbcd", "kbce", "kbcf", |
| "spic", "spig", "uaa", "uab"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_dta { |
| nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd", |
| "spie", "spih", "uad", "uca", "ucb"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_hdint { |
| nvidia,pins = "hdint", "ld0", "ld1", "ld2", |
| "ld3", "ld4", "ld5", "ld6", "ld7", |
| "ld8", "ld9", "ld10", "ld11", "ld12", |
| "ld13", "ld14", "ld15", "ld16", "ld17", |
| "ldc", "ldi", "lhs", "lsc0", "lspi", |
| "lvs", "pmc"; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_lc { |
| nvidia,pins = "lc", "ls"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| }; |
| conf_lcsn { |
| nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2", |
| "lm0", "lm1", "lpp", "lpw0", "lpw1", |
| "lpw2", "lsc1", "lsck", "lsda", "lsdi", |
| "lvp0", "lvp1", "sdb"; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_ld17_0 { |
| nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| "ld23_22"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| }; |
| }; |
| }; |
| |
| i2s@70002800 { |
| status = "okay"; |
| }; |
| |
| serial@70006000 { |
| status = "okay"; |
| }; |
| |
| serial@70006200 { |
| status = "okay"; |
| }; |
| |
| pwm: pwm@7000a000 { |
| status = "okay"; |
| }; |
| |
| lvds_ddc: i2c@7000c000 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| alc5632: alc5632@1e { |
| compatible = "realtek,alc5632"; |
| reg = <0x1e>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| hdmi_ddc: i2c@7000c400 { |
| status = "okay"; |
| clock-frequency = <100000>; |
| }; |
| |
| nvec@7000c500 { |
| compatible = "nvidia,nvec"; |
| reg = <0x7000c500 0x100>; |
| interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clock-frequency = <80000>; |
| request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; |
| slave-addr = <138>; |
| clocks = <&tegra_car TEGRA20_CLK_I2C3>, |
| <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; |
| clock-names = "div-clk", "fast-clk"; |
| resets = <&tegra_car 67>; |
| reset-names = "i2c"; |
| }; |
| |
| memory-controller@7000f400 { |
| nvidia,use-ram-code; |
| |
| emc-tables@hynix { |
| nvidia,ram-code = <0x0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| emc-table@166500 { |
| reg = <166500>; |
| compatible = "nvidia,tegra20-emc-table"; |
| clock-frequency = <166500>; |
| nvidia,emc-registers = <0x0000000a 0x00000016 |
| 0x00000008 0x00000003 0x00000004 0x00000004 |
| 0x00000002 0x0000000c 0x00000003 0x00000003 |
| 0x00000002 0x00000001 0x00000004 0x00000005 |
| 0x00000004 0x00000009 0x0000000d 0x000004df |
| 0x00000000 0x00000003 0x00000003 0x00000003 |
| 0x00000003 0x00000001 0x0000000a 0x000000c8 |
| 0x00000003 0x00000006 0x00000004 0x00000008 |
| 0x00000002 0x00000000 0x00000000 0x00000002 |
| 0x00000000 0x00000000 0x00000083 0xe03b0323 |
| 0x007fe010 0x00001414 0x00000000 0x00000000 |
| 0x00000000 0x00000000 0x00000000 0x00000000>; |
| }; |
| |
| emc-table@333000 { |
| reg = <333000>; |
| compatible = "nvidia,tegra20-emc-table"; |
| clock-frequency = <333000>; |
| nvidia,emc-registers = <0x00000018 0x00000033 |
| 0x00000012 0x00000004 0x00000004 0x00000005 |
| 0x00000003 0x0000000c 0x00000006 0x00000006 |
| 0x00000003 0x00000001 0x00000004 0x00000005 |
| 0x00000004 0x00000009 0x0000000d 0x00000bff |
| 0x00000000 0x00000003 0x00000003 0x00000006 |
| 0x00000006 0x00000001 0x00000011 0x000000c8 |
| 0x00000003 0x0000000e 0x00000007 0x00000008 |
| 0x00000002 0x00000000 0x00000000 0x00000002 |
| 0x00000000 0x00000000 0x00000083 0xf0440303 |
| 0x007fe010 0x00001414 0x00000000 0x00000000 |
| 0x00000000 0x00000000 0x00000000 0x00000000>; |
| }; |
| }; |
| }; |
| |
| i2c@7000d000 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pmic: tps6586x@34 { |
| compatible = "ti,tps6586x"; |
| reg = <0x34>; |
| interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| sys-supply = <&p5valw_reg>; |
| vin-sm0-supply = <&sys_reg>; |
| vin-sm1-supply = <&sys_reg>; |
| vin-sm2-supply = <&sys_reg>; |
| vinldo01-supply = <&sm2_reg>; |
| vinldo23-supply = <&sm2_reg>; |
| vinldo4-supply = <&sm2_reg>; |
| vinldo678-supply = <&sm2_reg>; |
| vinldo9-supply = <&sm2_reg>; |
| |
| regulators { |
| sys_reg: sys { |
| regulator-name = "vdd_sys"; |
| regulator-always-on; |
| }; |
| |
| core_vdd_reg: sm0 { |
| regulator-name = "+1.2vs_sm0,vdd_core"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1225000>; |
| regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>; |
| regulator-coupled-max-spread = <170000 450000>; |
| regulator-always-on; |
| |
| nvidia,tegra-core-regulator; |
| }; |
| |
| cpu_vdd_reg: sm1 { |
| regulator-name = "+1.0vs_sm1,vdd_cpu"; |
| regulator-min-microvolt = <750000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>; |
| regulator-coupled-max-spread = <450000 450000>; |
| regulator-always-on; |
| |
| nvidia,tegra-cpu-regulator; |
| }; |
| |
| sm2_reg: sm2 { |
| regulator-name = "+3.7vs_sm2,vin_ldo*"; |
| regulator-min-microvolt = <3700000>; |
| regulator-max-microvolt = <3700000>; |
| regulator-always-on; |
| }; |
| |
| /* LDO0 is not connected to anything */ |
| |
| ldo1 { |
| regulator-name = "+1.1vs_ldo1,avdd_pll*"; |
| regulator-min-microvolt = <1100000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-always-on; |
| }; |
| |
| rtc_vdd_reg: ldo2 { |
| regulator-name = "+1.2vs_ldo2,vdd_rtc"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1225000>; |
| regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>; |
| regulator-coupled-max-spread = <170000 450000>; |
| regulator-always-on; |
| |
| nvidia,tegra-rtc-regulator; |
| }; |
| |
| ldo3 { |
| regulator-name = "+3.3vs_ldo3,avdd_usb*"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| ldo4 { |
| regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo5 { |
| regulator-name = "+2.85vs_ldo5,vcore_mmc"; |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| regulator-always-on; |
| }; |
| |
| ldo6 { |
| /* |
| * Research indicates this should be |
| * 1.8v; other boards that use this |
| * rail for the same purpose need it |
| * set to 1.8v. The schematic signal |
| * name is incorrect; perhaps copied |
| * from an incorrect NVIDIA reference. |
| */ |
| regulator-name = "+2.85vs_ldo6,avdd_vdac"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| hdmi_vdd_reg: ldo7 { |
| regulator-name = "+3.3vs_ldo7,avdd_hdmi"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| hdmi_pll_reg: ldo8 { |
| regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo9 { |
| regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| regulator-always-on; |
| }; |
| |
| ldo_rtc { |
| regulator-name = "+3.3vs_rtc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| adt7461@4c { |
| compatible = "adi,adt7461"; |
| reg = <0x4c>; |
| }; |
| }; |
| |
| pmc@7000e400 { |
| nvidia,invert-interrupt; |
| nvidia,suspend-mode = <1>; |
| nvidia,cpu-pwr-good-time = <2000>; |
| nvidia,cpu-pwr-off-time = <0>; |
| nvidia,core-pwr-good-time = <3845 3845>; |
| nvidia,core-pwr-off-time = <0>; |
| nvidia,sys-clock-req-active-high; |
| }; |
| |
| usb@c5000000 { |
| compatible = "nvidia,tegra20-udc"; |
| status = "okay"; |
| dr_mode = "peripheral"; |
| }; |
| |
| usb-phy@c5000000 { |
| status = "okay"; |
| }; |
| |
| usb@c5004000 { |
| status = "okay"; |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) |
| GPIO_ACTIVE_LOW>; |
| }; |
| |
| usb-phy@c5004000 { |
| status = "okay"; |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) |
| GPIO_ACTIVE_LOW>; |
| }; |
| |
| usb@c5008000 { |
| status = "okay"; |
| }; |
| |
| usb-phy@c5008000 { |
| status = "okay"; |
| }; |
| |
| sdhci@c8000000 { |
| status = "okay"; |
| cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; |
| power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| }; |
| |
| sdhci@c8000600 { |
| status = "okay"; |
| bus-width = <8>; |
| non-removable; |
| }; |
| |
| backlight: backlight { |
| compatible = "pwm-backlight"; |
| |
| enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>; |
| pwms = <&pwm 0 5000000>; |
| |
| brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>; |
| default-brightness-level = <10>; |
| |
| backlight-boot-off; |
| }; |
| |
| clocks { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| clk32k_in: clock@0 { |
| compatible = "fixed-clock"; |
| reg = <0>; |
| #clock-cells = <0>; |
| clock-frequency = <32768>; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| wakeup { |
| label = "Wakeup"; |
| gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_WAKEUP>; |
| wakeup-source; |
| }; |
| }; |
| |
| gpio-leds { |
| compatible = "gpio-leds"; |
| |
| wifi { |
| label = "wifi-led"; |
| gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "rfkill0"; |
| }; |
| }; |
| |
| panel: panel { |
| compatible = "samsung,ltn101nt05"; |
| |
| ddc-i2c-bus = <&lvds_ddc>; |
| power-supply = <&vdd_pnl_reg>; |
| enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>; |
| |
| backlight = <&backlight>; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| p5valw_reg: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| regulator-name = "+5valw"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| vdd_pnl_reg: regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "+3VS,vdd_pnl"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| }; |
| |
| sound { |
| compatible = "nvidia,tegra-audio-alc5632-paz00", |
| "nvidia,tegra-audio-alc5632"; |
| |
| nvidia,model = "Compal PAZ00"; |
| |
| nvidia,audio-routing = |
| "Int Spk", "SPKOUT", |
| "Int Spk", "SPKOUTN", |
| "Headset Mic", "MICBIAS1", |
| "MIC1", "Headset Mic", |
| "Headset Stereophone", "HPR", |
| "Headset Stereophone", "HPL", |
| "DMICDAT", "Digital Mic"; |
| |
| nvidia,audio-codec = <&alc5632>; |
| nvidia,i2s-controller = <&tegra_i2s1>; |
| nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) |
| GPIO_ACTIVE_HIGH>; |
| |
| clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
| <&tegra_car TEGRA20_CLK_CDEV1>; |
| clock-names = "pll_a", "pll_a_out0", "mclk"; |
| }; |
| |
| cpus { |
| cpu0: cpu@0 { |
| cpu-supply = <&cpu_vdd_reg>; |
| operating-points-v2 = <&cpu0_opp_table>; |
| }; |
| |
| cpu@1 { |
| cpu-supply = <&cpu_vdd_reg>; |
| operating-points-v2 = <&cpu0_opp_table>; |
| }; |
| }; |
| }; |
