| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: MediaTek DISP_PWM Controller |
| |
| maintainers: |
| - Jitao Shi <jitao.shi@mediatek.com> |
| - Xinlei Lee <xinlei.lee@mediatek.com> |
| |
| allOf: |
| - $ref: pwm.yaml# |
| |
| properties: |
| compatible: |
| oneOf: |
| - enum: |
| - mediatek,mt2701-disp-pwm |
| - mediatek,mt6595-disp-pwm |
| - mediatek,mt8173-disp-pwm |
| - mediatek,mt8183-disp-pwm |
| - items: |
| - const: mediatek,mt8167-disp-pwm |
| - const: mediatek,mt8173-disp-pwm |
| - items: |
| - enum: |
| - mediatek,mt8186-disp-pwm |
| - mediatek,mt8188-disp-pwm |
| - mediatek,mt8192-disp-pwm |
| - mediatek,mt8195-disp-pwm |
| - const: mediatek,mt8183-disp-pwm |
| |
| reg: |
| maxItems: 1 |
| |
| "#pwm-cells": |
| const: 2 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Main Clock |
| - description: Mm Clock |
| |
| clock-names: |
| items: |
| - const: main |
| - const: mm |
| |
| required: |
| - compatible |
| - reg |
| - "#pwm-cells" |
| - clocks |
| - clock-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/mt8173-clk.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| pwm0: pwm@1401e000 { |
| compatible = "mediatek,mt8173-disp-pwm"; |
| reg = <0x1401e000 0x1000>; |
| #pwm-cells = <2>; |
| clocks = <&mmsys CLK_MM_DISP_PWM026M>, |
| <&mmsys CLK_MM_DISP_PWM0MM>; |
| clock-names = "main", "mm"; |
| }; |
