| commit | 1ae73f2f16f1a905ada71e2a190d5760b4f17ed8 | [log] [tgz] |
|---|---|---|
| author | Ben Skeggs <bskeggs@redhat.com> | Tue Feb 07 09:59:54 2012 +1000 |
| committer | Ben Skeggs <bskeggs@redhat.com> | Tue Mar 13 17:14:58 2012 +1000 |
| tree | 10ee30114c0333feed5b80bffb571d9b935c70d0 | |
| parent | 44ab8cc56c45ca781371a4a77f35da19cf5db028 [diff] |
drm/nvc0/pm: restrict pll mode to clocks that can actually use it Fixes reclocking failure on some chips where we attempted to set PDAEMON to PLL mode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>