Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cadence I2C controller

maintainers:
  - Michal Simek <michal.simek@amd.com>

allOf:
  - $ref: /schemas/i2c/i2c-controller.yaml#

properties:
  compatible:
    enum:
      - cdns,i2c-r1p10 # cadence i2c controller version 1.0
      - cdns,i2c-r1p14 # cadence i2c controller version 1.4

  reg:
    maxItems: 1

  clocks:
    minItems: 1

  resets:
    maxItems: 1

  interrupts:
    maxItems: 1

  clock-frequency:
    minimum: 1
    maximum: 400000
    description: |
      Desired operating frequency, in Hz, of the bus.

  clock-name:
    const: pclk
    description: |
      Input clock name.

  fifo-depth:
    description:
      Size of the data FIFO in bytes.
    $ref: /schemas/types.yaml#/definitions/uint32
    default: 16
    enum: [2, 4, 8, 16, 32, 64, 128, 256]

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - interrupts

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    i2c@e0004000 {
        compatible = "cdns,i2c-r1p10";
        clocks = <&clkc 38>;
        resets = <&rstc 288>;
        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
        reg = <0xe0004000 0x1000>;
        clock-frequency = <400000>;
        #address-cells = <1>;
        #size-cells = <0>;
        fifo-depth = <8>;
    };