blob: db8224dfba2c1bab0da508acf8c6e925bd588790 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-aon.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra234 AON Pinmux Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
compatible:
const: nvidia,tegra234-pinmux-aon
reg:
maxItems: 1
patternProperties:
"^pinmux(-[a-z0-9-]+)?$":
type: object
# pin groups
additionalProperties:
$ref: nvidia,tegra234-pinmux-common.yaml
properties:
nvidia,pins:
items:
enum: [ can0_dout_paa0, can0_din_paa1, can1_dout_paa2,
can1_din_paa3, can0_stb_paa4, can0_en_paa5,
soc_gpio49_paa6, can0_err_paa7, can1_stb_pbb0,
can1_en_pbb1, soc_gpio50_pbb2, can1_err_pbb3,
spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5,
uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2,
sce_error_pee0, vcomp_alert_pee1,
ao_retention_n_pee2, batt_oc_pee3, power_on_pee4,
soc_gpio26_pee5, soc_gpio27_pee6, bootv_ctl_n_pee7,
hdmi_cec_pgg0,
# drive groups
drive_touch_clk_pcc4, drive_uart3_rx_pcc6,
drive_uart3_tx_pcc5, drive_gen8_i2c_sda_pdd2,
drive_gen8_i2c_scl_pdd1, drive_spi2_mosi_pcc2,
drive_gen2_i2c_scl_pcc7, drive_spi2_cs0_pcc3,
drive_gen2_i2c_sda_pdd0, drive_spi2_sck_pcc0,
drive_spi2_miso_pcc1, drive_can1_dout_paa2,
drive_can1_din_paa3, drive_can0_dout_paa0,
drive_can0_din_paa1, drive_can0_stb_paa4,
drive_can0_en_paa5, drive_soc_gpio49_paa6,
drive_can0_err_paa7, drive_can1_stb_pbb0,
drive_can1_en_pbb1, drive_soc_gpio50_pbb2,
drive_can1_err_pbb3, drive_sce_error_pee0,
drive_batt_oc_pee3, drive_bootv_ctl_n_pee7,
drive_power_on_pee4, drive_soc_gpio26_pee5,
drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,
drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
pinmux@c300000 {
compatible = "nvidia,tegra234-pinmux-aon";
reg = <0xc300000 0x4000>;
pinctrl-names = "cec";
pinctrl-0 = <&cec_state>;
cec_state: pinmux-cec {
cec {
nvidia,pins = "hdmi_cec_pgg0";
nvidia,function = "gp";
};
};
};
...