| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#" |
| $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| |
| title: Renesas SDHI SD/MMC controller |
| |
| maintainers: |
| - Wolfram Sang <wsa+renesas@sang-engineering.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - const: renesas,sdhi-sh73a0 # R-Mobile APE6 |
| - items: |
| - const: renesas,sdhi-r7s72100 # RZ/A1H |
| - items: |
| - const: renesas,sdhi-r7s9210 # SH-Mobile AG5 |
| - items: |
| - const: renesas,sdhi-r8a73a4 # R-Mobile APE6 |
| - items: |
| - const: renesas,sdhi-r8a7740 # R-Mobile A1 |
| - items: |
| - enum: |
| - renesas,sdhi-r8a7778 # R-Car M1 |
| - renesas,sdhi-r8a7779 # R-Car H1 |
| - const: renesas,rcar-gen1-sdhi # R-Car Gen1 |
| - items: |
| - enum: |
| - renesas,sdhi-r8a7742 # RZ/G1H |
| - renesas,sdhi-r8a7743 # RZ/G1M |
| - renesas,sdhi-r8a7744 # RZ/G1N |
| - renesas,sdhi-r8a7745 # RZ/G1E |
| - renesas,sdhi-r8a77470 # RZ/G1C |
| - renesas,sdhi-r8a7790 # R-Car H2 |
| - renesas,sdhi-r8a7791 # R-Car M2-W |
| - renesas,sdhi-r8a7792 # R-Car V2H |
| - renesas,sdhi-r8a7793 # R-Car M2-N |
| - renesas,sdhi-r8a7794 # R-Car E2 |
| - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 |
| - items: |
| - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP) |
| - items: |
| - enum: |
| - renesas,sdhi-r8a774a1 # RZ/G2M |
| - renesas,sdhi-r8a774b1 # RZ/G2N |
| - renesas,sdhi-r8a774c0 # RZ/G2E |
| - renesas,sdhi-r8a774e1 # RZ/G2H |
| - renesas,sdhi-r8a7795 # R-Car H3 |
| - renesas,sdhi-r8a7796 # R-Car M3-W |
| - renesas,sdhi-r8a77961 # R-Car M3-W+ |
| - renesas,sdhi-r8a77965 # R-Car M3-N |
| - renesas,sdhi-r8a77970 # R-Car V3M |
| - renesas,sdhi-r8a77980 # R-Car V3H |
| - renesas,sdhi-r8a77990 # R-Car E3 |
| - renesas,sdhi-r8a77995 # R-Car D3 |
| - renesas,sdhi-r8a779a0 # R-Car V3U |
| - renesas,sdhi-r9a07g044 # RZ/G2{L,LC} |
| - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| minItems: 1 |
| maxItems: 3 |
| |
| clocks: true |
| |
| clock-names: true |
| |
| dmas: |
| minItems: 4 |
| maxItems: 4 |
| |
| dma-names: |
| minItems: 4 |
| maxItems: 4 |
| items: |
| enum: |
| - tx |
| - rx |
| |
| power-domains: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| pinctrl-0: |
| minItems: 1 |
| maxItems: 2 |
| |
| pinctrl-1: |
| maxItems: 1 |
| |
| pinctrl-names: true |
| |
| max-frequency: true |
| |
| allOf: |
| - $ref: "mmc-controller.yaml" |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: renesas,sdhi-r9a07g044 |
| then: |
| properties: |
| clocks: |
| items: |
| - description: IMCLK, SDHI channel main clock1. |
| - description: IMCLK2, SDHI channel main clock2. When this clock is |
| turned off, external SD card detection cannot be |
| detected. |
| - description: CLK_HS, SDHI channel High speed clock which operates |
| 4 times that of SDHI channel main clock1. |
| - description: ACLK, SDHI channel bus clock. |
| clock-names: |
| items: |
| - const: imclk |
| - const: imclk2 |
| - const: clk_hs |
| - const: aclk |
| required: |
| - clock-names |
| - resets |
| else: |
| properties: |
| clocks: |
| minItems: 1 |
| maxItems: 2 |
| clock-names: |
| minItems: 1 |
| items: |
| - const: core |
| - const: cd |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: renesas,sdhi-mmc-r8a77470 |
| then: |
| properties: |
| pinctrl-names: |
| items: |
| - const: state_uhs |
| else: |
| properties: |
| pinctrl-names: |
| minItems: 1 |
| items: |
| - const: default |
| - const: state_uhs |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - renesas,sdhi-r7s72100 |
| - renesas,sdhi-r7s9210 |
| then: |
| required: |
| - clock-names |
| description: |
| The internal card detection logic that exists in these controllers is |
| sectioned off to be run by a separate second clock source to allow |
| the main core clock to be turned off to save power. |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - power-domains |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/r8a7790-cpg-mssr.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/power/r8a7790-sysc.h> |
| |
| sdhi0: mmc@ee100000 { |
| compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; |
| reg = <0xee100000 0x328>; |
| interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 314>; |
| dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; |
| dma-names = "tx", "rx", "tx", "rx"; |
| max-frequency = <195000000>; |
| power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| resets = <&cpg 314>; |
| }; |
| |
| sdhi1: mmc@ee120000 { |
| compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; |
| reg = <0xee120000 0x328>; |
| interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 313>; |
| dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; |
| dma-names = "tx", "rx", "tx", "rx"; |
| max-frequency = <195000000>; |
| power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| resets = <&cpg 313>; |
| }; |
| |
| sdhi2: mmc@ee140000 { |
| compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; |
| reg = <0xee140000 0x100>; |
| interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 312>; |
| dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; |
| dma-names = "tx", "rx", "tx", "rx"; |
| max-frequency = <97500000>; |
| power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| resets = <&cpg 312>; |
| }; |
| |
| sdhi3: mmc@ee160000 { |
| compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; |
| reg = <0xee160000 0x100>; |
| interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_MOD 311>; |
| dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; |
| dma-names = "tx", "rx", "tx", "rx"; |
| max-frequency = <97500000>; |
| power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| resets = <&cpg 311>; |
| }; |
