Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt

Qualcomm MSM8974 TLMM block

Required properties:
- compatible: "qcom,msm8x74-pinctrl"
- reg: Should be the base address and length of the TLMM block.
- interrupts: Should be the parent IRQ of the TLMM block.
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells: Should be two.
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells : Should be two.
                The first cell is the gpio pin number and the
                second cell is used for optional parameters.

Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.

Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".

Qualcomm's pin configuration nodes act as a container for an abitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
parameters, such as pull-up, drive strength, etc.

The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.

Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.


The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
 pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength.

Non-empty subnodes must specify the 'pins' property.
Note that not all properties are valid for all pins.


Valid values for qcom,pins are:
  gpio0-gpio145
    Supports mux, bias and drive-strength

  sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data
    Supports bias and drive-strength

Valid values for qcom,function are:
  blsp_i2c2, blsp_i2c6, blsp_i2c11, blsp_spi1, blsp_uart2, blsp_uart8, slimbus

  (Note that this is not yet the complete list of functions)



Example:

	msmgpio: pinctrl@fd510000 {
		compatible = "qcom,msm8974-pinctrl";
		reg = <0xfd510000 0x4000>;

		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <0 208 0>;

		pinctrl-names = "default";
		pinctrl-0 = <&uart2_default>;

		uart2_default: uart2_default {
			mux {
				qcom,pins = "gpio4", "gpio5";
				qcom,function = "blsp_uart2";
			};

			tx {
				qcom,pins = "gpio4";
				drive-strength = <4>;
				bias-disable;
			};

			rx {
				qcom,pins = "gpio5";
				drive-strength = <2>;
				bias-pull-up;
			};
		};
	};