| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra ACONNECT Bus |
| |
| description: | |
| The Tegra ACONNECT bus is an AXI switch which is used to connect various |
| components inside the Audio Processing Engine (APE). All CPU accesses to |
| the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All |
| devices accessed via the ACONNECT are described by child-nodes. |
| |
| maintainers: |
| - Jon Hunter <jonathanh@nvidia.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - const: nvidia,tegra210-aconnect |
| - items: |
| - enum: |
| - nvidia,tegra234-aconnect |
| - nvidia,tegra186-aconnect |
| - nvidia,tegra194-aconnect |
| - const: nvidia,tegra210-aconnect |
| |
| clocks: |
| items: |
| - description: Must contain the entry for APE clock |
| - description: Must contain the entry for APE interface clock |
| |
| clock-names: |
| items: |
| - const: ape |
| - const: apb2ape |
| |
| power-domains: |
| maxItems: 1 |
| |
| "#address-cells": |
| enum: [ 1, 2 ] |
| |
| "#size-cells": |
| enum: [ 1, 2 ] |
| |
| ranges: true |
| |
| patternProperties: |
| "@[0-9a-f]+$": |
| type: object |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - power-domains |
| - "#address-cells" |
| - "#size-cells" |
| - ranges |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include<dt-bindings/clock/tegra210-car.h> |
| |
| aconnect@702c0000 { |
| compatible = "nvidia,tegra210-aconnect"; |
| clocks = <&tegra_car TEGRA210_CLK_APE>, |
| <&tegra_car TEGRA210_CLK_APB2APE>; |
| clock-names = "ape", "apb2ape"; |
| power-domains = <&pd_audio>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x702c0000 0x702c0000 0x00040000>; |
| |
| // Child device nodes follow ... |
| }; |
| |
| ... |