| # SPDX-License-Identifier: GPL-2.0-or-later |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: ASPEED AST2500 Pin Controller |
| |
| maintainers: |
| - Andrew Jeffery <andrew@aj.id.au> |
| |
| description: |+ |
| The pin controller node should be the child of a syscon node with the |
| required property: |
| |
| - compatible: Should be one of the following: |
| "aspeed,ast2500-scu", "syscon", "simple-mfd" |
| "aspeed,g5-scu", "syscon", "simple-mfd" |
| |
| Refer to the bindings described in |
| Documentation/devicetree/bindings/mfd/syscon.yaml |
| |
| properties: |
| compatible: |
| const: aspeed,ast2500-pinctrl |
| reg: |
| maxItems: 2 |
| |
| aspeed,external-nodes: |
| minItems: 2 |
| maxItems: 2 |
| items: |
| maxItems: 1 |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| description: | |
| A cell of phandles to external controller nodes: |
| 0: compatible with "aspeed,ast2500-gfx", "syscon" |
| 1: compatible with "aspeed,ast2500-lpc", "syscon" |
| |
| additionalProperties: |
| $ref: pinmux-node.yaml# |
| additionalProperties: false |
| |
| properties: |
| pins: true |
| bias-disable: true |
| |
| patternProperties: |
| "^function|groups$": |
| enum: |
| - ACPI |
| - ADC0 |
| - ADC1 |
| - ADC10 |
| - ADC11 |
| - ADC12 |
| - ADC13 |
| - ADC14 |
| - ADC15 |
| - ADC2 |
| - ADC3 |
| - ADC4 |
| - ADC5 |
| - ADC6 |
| - ADC7 |
| - ADC8 |
| - ADC9 |
| - BMCINT |
| - DDCCLK |
| - DDCDAT |
| - ESPI |
| - FWSPICS1 |
| - FWSPICS2 |
| - GPID0 |
| - GPID2 |
| - GPID4 |
| - GPID6 |
| - GPIE0 |
| - GPIE2 |
| - GPIE4 |
| - GPIE6 |
| - I2C10 |
| - I2C11 |
| - I2C12 |
| - I2C13 |
| - I2C14 |
| - I2C3 |
| - I2C4 |
| - I2C5 |
| - I2C6 |
| - I2C7 |
| - I2C8 |
| - I2C9 |
| - LAD0 |
| - LAD1 |
| - LAD2 |
| - LAD3 |
| - LCLK |
| - LFRAME |
| - LPCHC |
| - LPCPD |
| - LPCPLUS |
| - LPCPME |
| - LPCRST |
| - LPCSMI |
| - LSIRQ |
| - MAC1LINK |
| - MAC2LINK |
| - MDIO1 |
| - MDIO2 |
| - NCTS1 |
| - NCTS2 |
| - NCTS3 |
| - NCTS4 |
| - NDCD1 |
| - NDCD2 |
| - NDCD3 |
| - NDCD4 |
| - NDSR1 |
| - NDSR2 |
| - NDSR3 |
| - NDSR4 |
| - NDTR1 |
| - NDTR2 |
| - NDTR3 |
| - NDTR4 |
| - NRI1 |
| - NRI2 |
| - NRI3 |
| - NRI4 |
| - NRTS1 |
| - NRTS2 |
| - NRTS3 |
| - NRTS4 |
| - OSCCLK |
| - PEWAKE |
| - PNOR |
| - PWM0 |
| - PWM1 |
| - PWM2 |
| - PWM3 |
| - PWM4 |
| - PWM5 |
| - PWM6 |
| - PWM7 |
| - RGMII1 |
| - RGMII2 |
| - RMII1 |
| - RMII2 |
| - RXD1 |
| - RXD2 |
| - RXD3 |
| - RXD4 |
| - SALT1 |
| - SALT10 |
| - SALT11 |
| - SALT12 |
| - SALT13 |
| - SALT14 |
| - SALT2 |
| - SALT3 |
| - SALT4 |
| - SALT5 |
| - SALT6 |
| - SALT7 |
| - SALT8 |
| - SALT9 |
| - SCL1 |
| - SCL2 |
| - SD1 |
| - SD2 |
| - SDA1 |
| - SDA2 |
| - SGPM |
| - SGPS1 |
| - SGPS2 |
| - SIOONCTRL |
| - SIOPBI |
| - SIOPBO |
| - SIOPWREQ |
| - SIOPWRGD |
| - SIOS3 |
| - SIOS5 |
| - SIOSCI |
| - SPI1 |
| - SPI1CS1 |
| - SPI1DEBUG |
| - SPI1PASSTHRU |
| - SPI2CK |
| - SPI2CS0 |
| - SPI2CS1 |
| - SPI2MISO |
| - SPI2MOSI |
| - TIMER3 |
| - TIMER4 |
| - TIMER5 |
| - TIMER6 |
| - TIMER7 |
| - TIMER8 |
| - TXD1 |
| - TXD2 |
| - TXD3 |
| - TXD4 |
| - UART6 |
| - USB11BHID |
| - USB2AD |
| - USB2AH |
| - USB2BD |
| - USB2BH |
| - USBCKI |
| - VGABIOSROM |
| - VGAHS |
| - VGAVS |
| - VPI24 |
| - VPO |
| - WDTRST1 |
| - WDTRST2 |
| |
| allOf: |
| - $ref: pinctrl.yaml# |
| |
| required: |
| - compatible |
| - aspeed,external-nodes |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/aspeed-clock.h> |
| scu@1e6e2000 { |
| compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; |
| reg = <0x1e6e2000 0x1a8>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0x1e6e2000 0x1000>; |
| |
| pinctrl: pinctrl { |
| compatible = "aspeed,ast2500-pinctrl"; |
| aspeed,external-nodes = <&gfx>, <&lhc>; |
| |
| pinctrl_i2c3_default: i2c3_default { |
| function = "I2C3"; |
| groups = "I2C3"; |
| }; |
| |
| pinctrl_gpioh0_unbiased_default: gpioh0 { |
| pins = "A18"; |
| bias-disable; |
| }; |
| }; |
| }; |
