| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra186 (and later) Display Controller |
| |
| maintainers: |
| - Thierry Reding <thierry.reding@gmail.com> |
| - Jon Hunter <jonathanh@nvidia.com> |
| |
| properties: |
| $nodename: |
| pattern: "^display@[0-9a-f]+$" |
| |
| compatible: |
| enum: |
| - nvidia,tegra186-dc |
| - nvidia,tegra194-dc |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: display controller pixel clock |
| |
| clock-names: |
| items: |
| - const: dc |
| |
| resets: |
| items: |
| - description: display controller reset |
| |
| reset-names: |
| items: |
| - const: dc |
| |
| power-domains: |
| maxItems: 1 |
| |
| iommus: |
| maxItems: 1 |
| |
| interconnects: |
| description: Description of the interconnect paths for the |
| display controller; see ../interconnect/interconnect.txt |
| for details. |
| |
| interconnect-names: |
| items: |
| - const: dma-mem # read-0 |
| - const: read-1 |
| |
| nvidia,outputs: |
| description: A list of phandles of outputs that this display |
| controller can drive. |
| $ref: "/schemas/types.yaml#/definitions/phandle-array" |
| |
| nvidia,head: |
| description: The number of the display controller head. This |
| is used to setup the various types of output to receive |
| video data from the given head. |
| $ref: "/schemas/types.yaml#/definitions/uint32" |
| |
| additionalProperties: false |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| - resets |
| - reset-names |
| - power-domains |
| - nvidia,outputs |
| - nvidia,head |
| |
| # see nvidia,tegra186-display.yaml for examples |
