| Micrel PHY properties. |
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| These properties cover the base properties Micrel PHYs. |
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| Optional properties: |
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| - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs. |
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| Configure the LED mode with single value. The list of PHYs and the |
| bits that are currently supported: |
| |
| KSZ8001: register 0x1e, bits 15..14 |
| KSZ8041: register 0x1e, bits 15..14 |
| KSZ8021: register 0x1f, bits 5..4 |
| KSZ8031: register 0x1f, bits 5..4 |
| KSZ8051: register 0x1f, bits 5..4 |
| KSZ8081: register 0x1f, bits 5..4 |
| KSZ8091: register 0x1f, bits 5..4 |
| LAN8814: register EP5.0, bit 6 |
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| See the respective PHY datasheet for the mode values. |
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| - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select |
| bit selects 25 MHz mode |
| |
| Setting the RMII Reference Clock Select bit enables 25 MHz rather |
| than 50 MHz clock mode. |
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| Note that this option in only needed for certain PHY revisions with a |
| non-standard, inverted function of this configuration bit. |
| Specifically, a clock reference ("rmii-ref" below) is always needed to |
| actually select a mode. |
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| - clocks, clock-names: contains clocks according to the common clock bindings. |
| |
| supported clocks: |
| - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference |
| input clock. Used to determine the XI input clock. |
| |
| - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode |
| |
| Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled |
| by the FXEN boot strapping pin. It can't be determined from the PHY |
| registers whether the PHY is in fiber mode, so this boolean device tree |
| property can be used to describe it. |
| |
| In fiber mode, auto-negotiation is disabled and the PHY can only work in |
| 100base-fx (full and half duplex) modes. |
| |
| - coma-mode-gpios: If present the given gpio will be deasserted when the |
| PHY is probed. |
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| Some PHYs have a COMA mode input pin which puts the PHY into |
| isolate and power-down mode. On some boards this input is connected |
| to a GPIO of the SoC. |
| |
| Supported on the LAN8814. |