| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NXP i.MX93 Media blk-ctrl |
| |
| maintainers: |
| - Peng Fan <peng.fan@nxp.com> |
| |
| description: |
| The i.MX93 MEDIAMIX domain contains control and status registers known |
| as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include |
| clocking, reset, and miscellaneous top-level controls for peripherals |
| within the MEDIAMIX domain |
| |
| properties: |
| compatible: |
| items: |
| - const: fsl,imx93-media-blk-ctrl |
| - const: syscon |
| |
| reg: |
| maxItems: 1 |
| |
| '#power-domain-cells': |
| const: 1 |
| |
| power-domains: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 10 |
| |
| clock-names: |
| items: |
| - const: apb |
| - const: axi |
| - const: nic |
| - const: disp |
| - const: cam |
| - const: pxp |
| - const: lcdif |
| - const: isi |
| - const: csi |
| - const: dsi |
| |
| required: |
| - compatible |
| - reg |
| - power-domains |
| - clocks |
| - clock-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/imx93-clock.h> |
| #include <dt-bindings/power/fsl,imx93-power.h> |
| |
| media_blk_ctrl: system-controller@4ac10000 { |
| compatible = "fsl,imx93-media-blk-ctrl", "syscon"; |
| reg = <0x4ac10000 0x10000>; |
| power-domains = <&mediamix>; |
| clocks = <&clk IMX93_CLK_MEDIA_APB>, |
| <&clk IMX93_CLK_MEDIA_AXI>, |
| <&clk IMX93_CLK_NIC_MEDIA_GATE>, |
| <&clk IMX93_CLK_MEDIA_DISP_PIX>, |
| <&clk IMX93_CLK_CAM_PIX>, |
| <&clk IMX93_CLK_PXP_GATE>, |
| <&clk IMX93_CLK_LCDIF_GATE>, |
| <&clk IMX93_CLK_ISI_GATE>, |
| <&clk IMX93_CLK_MIPI_CSI_GATE>, |
| <&clk IMX93_CLK_MIPI_DSI_GATE>; |
| clock-names = "apb", "axi", "nic", "disp", "cam", |
| "pxp", "lcdif", "isi", "csi", "dsi"; |
| #power-domain-cells = <1>; |
| }; |
