Documentation/devicetree/bindings/sound/wlf,wm8903.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/sound/wlf,wm8903.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: WM8903 audio codec

description: |
  This device supports I2C only.
  Pins on the device (for linking into audio routes):
      * IN1L
      * IN1R
      * IN2L
      * IN2R
      * IN3L
      * IN3R
      * DMICDAT
      * HPOUTL
      * HPOUTR
      * LINEOUTL
      * LINEOUTR
      * LOP
      * LON
      * ROP
      * RON
      * MICBIAS

maintainers:
  - patches@opensource.cirrus.com

properties:
  compatible:
    const: wlf,wm8903

  reg:
    maxItems: 1

  gpio-controller: true
  '#gpio-cells':
    const: 2

  interrupts:
    maxItems: 1

  micdet-cfg:
    $ref: /schemas/types.yaml#/definitions/uint32
    default: 0
    description: Default register value for R6 (Mic Bias).

  micdet-delay:
    $ref: /schemas/types.yaml#/definitions/uint32
    default: 100
    description: The debounce delay for microphone detection in mS.

  gpio-cfg:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    description: |
      minItems: 5
      maxItems: 5
      A list of GPIO configuration register values.
      If absent, no configuration of these registers is performed.
      If any entry has the value 0xffffffff, that GPIO's
      configuration will not be modified.

  AVDD-supply:
    description: Analog power supply regulator on the AVDD pin.

  CPVDD-supply:
    description: Charge pump supply regulator on the CPVDD pin.

  DBVDD-supply:
    description: Digital buffer supply regulator for the DBVDD pin.

  DCVDD-supply:
    description: Digital core supply regulator for the DCVDD pin.


required:
  - compatible
  - reg
  - gpio-controller
  - '#gpio-cells'

additionalProperties: false

examples:
  - |
    i2c {
      #address-cells = <1>;
      #size-cells = <0>;

      wm8903: codec@1a {
        compatible = "wlf,wm8903";
        reg = <0x1a>;
        interrupts = <347>;

        AVDD-supply = <&fooreg_a>;
        CPVDD-supply = <&fooreg_b>;
        DBVDD-supply = <&fooreg_c>;
        DCVDD-supply = <&fooreg_d>;

        gpio-controller;
        #gpio-cells = <2>;

        micdet-cfg = <0>;
        micdet-delay = <100>;
        gpio-cfg = <
          0x0600 /* DMIC_LR, output */
          0x0680 /* DMIC_DAT, input */
          0x0000 /* GPIO, output, low */
          0x0200 /* Interrupt, output */
          0x01a0 /* BCLK, input, active high */
        >;
      };
    };