| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ |
| #define ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ |
| |
| /* |
| ***************************************** |
| * SRAM_Y0_X0_RTR (Prototype: IC_RTR) |
| ***************************************** |
| */ |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_E_ARB 0x201100 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_W_ARB 0x201104 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_L_ARB 0x201110 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_E_ARB_MAX 0x201120 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_W_ARB_MAX 0x201124 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_L_ARB_MAX 0x201130 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_DATA_E_ARB 0x201140 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_DATA_W_ARB 0x201144 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_DATA_L_ARB 0x201148 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_WR_RS_E_ARB 0x201160 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_WR_RS_W_ARB 0x201164 |
| |
| #define mmSRAM_Y0_X0_RTR_HBW_WR_RS_L_ARB 0x201168 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_E_ARB 0x201200 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_W_ARB 0x201204 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_L_ARB 0x201210 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_E_ARB_MAX 0x201220 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_W_ARB_MAX 0x201224 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_L_ARB_MAX 0x201230 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_DATA_E_ARB 0x201240 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_DATA_W_ARB 0x201244 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_DATA_L_ARB 0x201248 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_WR_RS_E_ARB 0x201260 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_WR_RS_W_ARB 0x201264 |
| |
| #define mmSRAM_Y0_X0_RTR_LBW_WR_RS_L_ARB 0x201268 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_E_ARB 0x201300 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_W_ARB 0x201304 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_L_ARB 0x201310 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_E_ARB_MAX 0x201320 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_W_ARB_MAX 0x201324 |
| |
| #define mmSRAM_Y0_X0_RTR_DBG_L_ARB_MAX 0x201330 |
| |
| #endif /* ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ */ |