| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Driver for CPM (SCC/SMC) serial ports; CPM2 definitions |
| * |
| * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) |
| * Pantelis Antoniou (panto@intracom.gr) (CPM1) |
| * |
| * Copyright (C) 2004 Freescale Semiconductor, Inc. |
| * (C) 2004 Intracom, S.A. |
| * (C) 2006 MontaVista Software, Inc. |
| * Vitaly Bordug <vbordug@ru.mvista.com> |
| */ |
| |
| #include <linux/module.h> |
| #include <linux/tty.h> |
| #include <linux/ioport.h> |
| #include <linux/slab.h> |
| #include <linux/serial.h> |
| #include <linux/console.h> |
| #include <linux/sysrq.h> |
| #include <linux/device.h> |
| #include <linux/memblock.h> |
| #include <linux/dma-mapping.h> |
| |
| #include <asm/io.h> |
| #include <asm/irq.h> |
| #include <asm/fs_pd.h> |
| #include <asm/prom.h> |
| |
| #include <linux/serial_core.h> |
| #include <linux/kernel.h> |
| |
| #include "cpm_uart.h" |
| |
| /**************************************************************/ |
| |
| void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
| { |
| cpm_command(port->command, cmd); |
| } |
| |
| void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, |
| struct device_node *np) |
| { |
| void __iomem *pram; |
| unsigned long offset; |
| struct resource res; |
| resource_size_t len; |
| |
| /* Don't remap parameter RAM if it has already been initialized |
| * during console setup. |
| */ |
| if (IS_SMC(port) && port->smcup) |
| return port->smcup; |
| else if (!IS_SMC(port) && port->sccup) |
| return port->sccup; |
| |
| if (of_address_to_resource(np, 1, &res)) |
| return NULL; |
| |
| len = resource_size(&res); |
| pram = ioremap(res.start, len); |
| if (!pram) |
| return NULL; |
| |
| if (!IS_SMC(port)) |
| return pram; |
| |
| if (len != 2) { |
| printk(KERN_WARNING "cpm_uart[%d]: device tree references " |
| "SMC pram, using boot loader/wrapper pram mapping. " |
| "Please fix your device tree to reference the pram " |
| "base register instead.\n", |
| port->port.line); |
| return pram; |
| } |
| |
| offset = cpm_dpalloc(PROFF_SMC_SIZE, 64); |
| out_be16(pram, offset); |
| iounmap(pram); |
| return cpm_muram_addr(offset); |
| } |
| |
| void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) |
| { |
| if (!IS_SMC(port)) |
| iounmap(pram); |
| } |
| |
| /* |
| * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
| * receive buffer descriptors from dual port ram, and a character |
| * buffer area from host mem. If we are allocating for the console we need |
| * to do it from bootmem |
| */ |
| int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) |
| { |
| int dpmemsz, memsz; |
| u8 __iomem *dp_mem; |
| unsigned long dp_offset; |
| u8 *mem_addr; |
| dma_addr_t dma_addr = 0; |
| |
| pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); |
| |
| dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); |
| dp_offset = cpm_dpalloc(dpmemsz, 8); |
| if (IS_ERR_VALUE(dp_offset)) { |
| printk(KERN_ERR |
| "cpm_uart_cpm.c: could not allocate buffer descriptors\n"); |
| return -ENOMEM; |
| } |
| |
| dp_mem = cpm_dpram_addr(dp_offset); |
| |
| memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + |
| L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); |
| if (is_con) { |
| mem_addr = kzalloc(memsz, GFP_NOWAIT); |
| dma_addr = virt_to_bus(mem_addr); |
| } |
| else |
| mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, |
| GFP_KERNEL); |
| |
| if (mem_addr == NULL) { |
| cpm_dpfree(dp_offset); |
| printk(KERN_ERR |
| "cpm_uart_cpm.c: could not allocate coherent memory\n"); |
| return -ENOMEM; |
| } |
| |
| pinfo->dp_addr = dp_offset; |
| pinfo->mem_addr = mem_addr; |
| pinfo->dma_addr = dma_addr; |
| pinfo->mem_size = memsz; |
| |
| pinfo->rx_buf = mem_addr; |
| pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos |
| * pinfo->rx_fifosize); |
| |
| pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem; |
| pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; |
| |
| return 0; |
| } |
| |
| void cpm_uart_freebuf(struct uart_cpm_port *pinfo) |
| { |
| dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * |
| pinfo->rx_fifosize) + |
| L1_CACHE_ALIGN(pinfo->tx_nrfifos * |
| pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, |
| pinfo->dma_addr); |
| |
| cpm_dpfree(pinfo->dp_addr); |
| } |