arch/mips/boot/dts/brcm/bcm6358.dtsi

// SPDX-License-Identifier: GPL-2.0

#include "dt-bindings/clock/bcm6358-clock.h"
#include "dt-bindings/reset/bcm6358-reset.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm6358";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <150000000>;
		brcm,bmips-cbr-reg = <0xff400000>;

		cpu@0 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <1>;
		};
	};

	clocks {
		periph_osc: periph-osc {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
			clock-output-names = "periph";
		};
	};

	aliases {
		pflash = &pflash;
		serial0 = &uart0;
		serial1 = &uart1;
		spi0 = &lsspi;
	};

	cpu_intc: interrupt-controller {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	ubus {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges;

		periph_clk: clock-controller@fffe0004 {
			compatible = "brcm,bcm6358-clocks";
			reg = <0xfffe0004 0x4>;
			#clock-cells = <1>;
		};

		pll_cntl: syscon@fffe0008 {
			compatible = "syscon";
			reg = <0xfffe0008 0x4>;
			native-endian;

			reboot {
				compatible = "syscon-reboot";
				offset = <0x0>;
				mask = <0x1>;
			};
		};

		periph_intc: interrupt-controller@fffe000c {
			compatible = "brcm,bcm6345-l1-intc";
			reg = <0xfffe000c 0x8>,
			      <0xfffe0038 0x8>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>, <3>;
		};

		periph_rst: reset-controller@fffe0034 {
			compatible = "brcm,bcm6345-reset";
			reg = <0xfffe0034 0x4>;
			#reset-cells = <1>;
		};

		wdt: watchdog@fffe005c {
			compatible = "brcm,bcm7038-wdt";
			reg = <0xfffe005c 0xc>;

			clocks = <&periph_osc>;
			clock-names = "refclk";

			timeout-sec = <30>;
		};

		leds0: led-controller@fffe00d0 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,bcm6358-leds";
			reg = <0xfffe00d0 0x8>;

			status = "disabled";
		};

		uart0: serial@fffe0100 {
			compatible = "brcm,bcm6345-uart";
			reg = <0xfffe0100 0x18>;

			interrupt-parent = <&periph_intc>;
			interrupts = <2>;

			clocks = <&periph_osc>;
			clock-names = "refclk";

			status = "disabled";
		};

		uart1: serial@fffe0120 {
			compatible = "brcm,bcm6345-uart";
			reg = <0xfffe0120 0x18>;

			interrupt-parent = <&periph_intc>;
			interrupts = <3>;

			clocks = <&periph_osc>;
			clock-names = "refclk";

			status = "disabled";
		};

		lsspi: spi@fffe0800 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,bcm6358-spi";
			reg = <0xfffe0800 0x70c>;

			interrupt-parent = <&periph_intc>;
			interrupts = <1>;

			clocks = <&periph_clk BCM6358_CLK_SPI>;
			clock-names = "spi";

			resets = <&periph_rst BCM6358_RST_SPI>;
			reset-names = "spi";

			status = "disabled";
		};

		ehci: usb@fffe1300 {
			compatible = "brcm,bcm6358-ehci", "generic-ehci";
			reg = <0xfffe1300 0x100>;
			big-endian;

			interrupt-parent = <&periph_intc>;
			interrupts = <10>;

			phys = <&usbh 0>;
			phy-names = "usb";

			status = "disabled";
		};

		ohci: usb@fffe1400 {
			compatible = "brcm,bcm6358-ohci", "generic-ohci";
			reg = <0xfffe1400 0x100>;
			big-endian;
			no-big-frame-no;

			interrupt-parent = <&periph_intc>;
			interrupts = <5>;

			phys = <&usbh 0>;
			phy-names = "usb";

			status = "disabled";
		};

		usbh: usb-phy@fffe1500 {
			compatible = "brcm,bcm6358-usbh-phy";
			reg = <0xfffe1500 0x38>;
			#phy-cells = <1>;

			resets = <&periph_rst BCM6358_RST_USBH>;
			reset-names = "usbh";

			status = "disabled";
		};
	};

	pflash: nor@1e000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "cfi-flash";
		reg = <0x1e000000 0x2000000>;
		bank-width = <2>;

		status = "disabled";
	};
};