| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm SC7280 MSS Peripheral Image Loader |
| |
| maintainers: |
| - Sibi Sankar <quic_sibis@quicinc.com> |
| |
| description: |
| This document describes the hardware for a component that loads and boots firmware |
| on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core. |
| |
| properties: |
| compatible: |
| enum: |
| - qcom,sc7280-mss-pil |
| |
| reg: |
| items: |
| - description: MSS QDSP6 registers |
| - description: RMB registers |
| |
| reg-names: |
| items: |
| - const: qdsp6 |
| - const: rmb |
| |
| iommus: |
| items: |
| - description: MSA Stream 1 |
| - description: MSA Stream 2 |
| |
| interconnects: |
| items: |
| - description: Path leading to system memory |
| |
| interrupts: |
| items: |
| - description: Watchdog interrupt |
| - description: Fatal interrupt |
| - description: Ready interrupt |
| - description: Handover interrupt |
| - description: Stop acknowledge interrupt |
| - description: Shutdown acknowledge interrupt |
| |
| interrupt-names: |
| items: |
| - const: wdog |
| - const: fatal |
| - const: ready |
| - const: handover |
| - const: stop-ack |
| - const: shutdown-ack |
| |
| clocks: |
| items: |
| - description: GCC MSS IFACE clock |
| - description: GCC MSS OFFLINE clock |
| - description: GCC MSS SNOC_AXI clock |
| - description: RPMH PKA clock |
| - description: RPMH XO clock |
| |
| clock-names: |
| items: |
| - const: iface |
| - const: offline |
| - const: snoc_axi |
| - const: pka |
| - const: xo |
| |
| power-domains: |
| items: |
| - description: CX power domain |
| - description: MSS power domain |
| |
| power-domain-names: |
| items: |
| - const: cx |
| - const: mss |
| |
| resets: |
| items: |
| - description: AOSS restart |
| - description: PDC reset |
| |
| reset-names: |
| items: |
| - const: mss_restart |
| - const: pdc_reset |
| |
| memory-region: |
| items: |
| - description: MBA reserved region |
| - description: modem reserved region |
| |
| firmware-name: |
| $ref: /schemas/types.yaml#/definitions/string-array |
| items: |
| - description: Name of MBA firmware |
| - description: Name of modem firmware |
| |
| qcom,halt-regs: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| description: |
| Halt registers are used to halt transactions of various sub-components |
| within MSS. |
| items: |
| - items: |
| - description: phandle to TCSR_MUTEX registers |
| - description: offset to the Q6 halt register |
| - description: offset to the modem halt register |
| - description: offset to the nc halt register |
| - description: offset to the vq6 halt register |
| |
| qcom,ext-regs: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| description: EXT registers are used for various power related functionality |
| items: |
| - items: |
| - description: phandle to TCSR_REG registers |
| - description: offset to the force_clk_en register |
| - description: offset to the rscc_disable register |
| - items: |
| - description: phandle to TCSR_MUTEX registers |
| - description: offset to the axim1_clk_off register |
| - description: offset to the crypto_clk_off register |
| |
| qcom,qaccept-regs: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| description: QACCEPT registers are used to bring up/down Q-channels |
| items: |
| - items: |
| - description: phandle to TCSR_MUTEX registers |
| - description: offset to the mdm qaccept register |
| - description: offset to the cx qaccept register |
| - description: offset to the axi qaccept register |
| |
| qcom,qmp: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: Reference to the AOSS side-channel message RAM. |
| |
| qcom,smem-states: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| description: States used by the AP to signal the Hexagon core |
| items: |
| - description: Stop the modem |
| |
| qcom,smem-state-names: |
| description: The names of the state bits used for SMP2P output |
| const: stop |
| |
| glink-edge: |
| $ref: qcom,glink-edge.yaml# |
| description: |
| Qualcomm G-Link subnode which represents communication edge, channels |
| and devices related to the DSP. |
| |
| properties: |
| interrupts: |
| items: |
| - description: IRQ from MSS to GLINK |
| |
| mboxes: |
| items: |
| - description: Mailbox for communication between APPS and MSS |
| |
| label: |
| const: modem |
| |
| apr: false |
| fastrpc: false |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - iommus |
| - interconnects |
| - interrupts |
| - interrupt-names |
| - clocks |
| - clock-names |
| - power-domains |
| - power-domain-names |
| - resets |
| - reset-names |
| - qcom,halt-regs |
| - qcom,ext-regs |
| - qcom,qaccept-regs |
| - memory-region |
| - qcom,qmp |
| - qcom,smem-states |
| - qcom,smem-state-names |
| - glink-edge |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,gcc-sc7280.h> |
| #include <dt-bindings/clock/qcom,rpmh.h> |
| #include <dt-bindings/interconnect/qcom,sc7280.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/mailbox/qcom-ipcc.h> |
| #include <dt-bindings/power/qcom-rpmpd.h> |
| #include <dt-bindings/reset/qcom,sdm845-aoss.h> |
| #include <dt-bindings/reset/qcom,sdm845-pdc.h> |
| |
| remoteproc_mpss: remoteproc@4080000 { |
| compatible = "qcom,sc7280-mss-pil"; |
| reg = <0x04080000 0x10000>, <0x04180000 0x48>; |
| reg-names = "qdsp6", "rmb"; |
| |
| iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; |
| |
| interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; |
| |
| interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, |
| <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, |
| <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, |
| <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, |
| <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, |
| <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; |
| |
| interrupt-names = "wdog", "fatal", "ready", "handover", |
| "stop-ack", "shutdown-ack"; |
| |
| clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, |
| <&gcc GCC_MSS_OFFLINE_AXI_CLK>, |
| <&gcc GCC_MSS_SNOC_AXI_CLK>, |
| <&rpmhcc RPMH_PKA_CLK>, |
| <&rpmhcc RPMH_CXO_CLK>; |
| clock-names = "iface", "offline", "snoc_axi", "pka", "xo"; |
| |
| power-domains = <&rpmhpd SC7280_CX>, |
| <&rpmhpd SC7280_MSS>; |
| power-domain-names = "cx", "mss"; |
| |
| memory-region = <&mba_mem>, <&mpss_mem>; |
| |
| qcom,qmp = <&aoss_qmp>; |
| |
| qcom,smem-states = <&modem_smp2p_out 0>; |
| qcom,smem-state-names = "stop"; |
| |
| resets = <&aoss_reset AOSS_CC_MSS_RESTART>, |
| <&pdc_reset PDC_MODEM_SYNC_RESET>; |
| reset-names = "mss_restart", "pdc_reset"; |
| |
| qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; |
| qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>; |
| qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>; |
| |
| glink-edge { |
| interrupts-extended = <&ipcc IPCC_CLIENT_MPSS |
| IPCC_MPROC_SIGNAL_GLINK_QMP |
| IRQ_TYPE_EDGE_RISING>; |
| mboxes = <&ipcc IPCC_CLIENT_MPSS |
| IPCC_MPROC_SIGNAL_GLINK_QMP>; |
| label = "modem"; |
| qcom,remote-pid = <1>; |
| }; |
| }; |
