| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NXP Audio Transceiver (XCVR) Controller |
| |
| maintainers: |
| - Viorel Suman <viorel.suman@nxp.com> |
| |
| description: | |
| NXP XCVR (Audio Transceiver) is a on-chip functional module |
| that allows CPU to receive and transmit digital audio via |
| HDMI2.1 eARC, HDMI1.4 ARC and SPDIF. |
| |
| properties: |
| $nodename: |
| pattern: "^xcvr@.*" |
| |
| compatible: |
| enum: |
| - fsl,imx8mp-xcvr |
| - fsl,imx93-xcvr |
| |
| reg: |
| items: |
| - description: 20K RAM for code and data |
| - description: registers space |
| - description: RX FIFO address |
| - description: TX FIFO address |
| |
| reg-names: |
| items: |
| - const: ram |
| - const: regs |
| - const: rxfifo |
| - const: txfifo |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Peripheral clock |
| - description: PHY clock |
| - description: SPBA clock |
| - description: PLL clock |
| |
| clock-names: |
| items: |
| - const: ipg |
| - const: phy |
| - const: spba |
| - const: pll_ipg |
| |
| dmas: |
| items: |
| - description: DMA controller phandle and request line for RX |
| - description: DMA controller phandle and request line for TX |
| |
| dma-names: |
| items: |
| - const: rx |
| - const: tx |
| |
| resets: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - interrupts |
| - clocks |
| - clock-names |
| - dmas |
| - dma-names |
| - resets |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/imx8mp-clock.h> |
| #include <dt-bindings/reset/imx8mp-reset.h> |
| |
| xcvr: xcvr@30cc0000 { |
| compatible = "fsl,imx8mp-xcvr"; |
| reg = <0x30cc0000 0x800>, |
| <0x30cc0800 0x400>, |
| <0x30cc0c00 0x080>, |
| <0x30cc0e00 0x080>; |
| reg-names = "ram", "regs", "rxfifo", "txfifo"; |
| interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>, |
| <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>, |
| <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>, |
| <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>; |
| clock-names = "ipg", "phy", "spba", "pll_ipg"; |
| dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>; |
| dma-names = "rx", "tx"; |
| resets = <&audiomix_reset 0>; |
| }; |