| * Atmel SDHCI controller |
| |
| This file documents the differences between the core properties in |
| Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the |
| sdhci-of-at91 driver. |
| |
| Required properties: |
| - compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci" |
| or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci". |
| - clocks: Phandlers to the clocks. |
| - clock-names: Must be "hclock", "multclk", "baseclk" for |
| "atmel,sama5d2-sdhci". |
| Must be "hclock", "multclk" for "microchip,sam9x60-sdhci". |
| Must be "hclock", "multclk" for "microchip,sam9x7-sdhci". |
| |
| Optional properties: |
| - assigned-clocks: The same with "multclk". |
| - assigned-clock-rates The rate of "multclk" in order to not rely on the |
| gck configuration set by previous components. |
| - microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is |
| inverted. The default polarity for this signal is described in the datasheet. |
| For instance on SAMA5D2, the pin is usually tied to the GND with a resistor |
| and a capacitor (see "SDMMC I/O Calibration" chapter). |
| |
| Example: |
| |
| mmc0: sdio-host@a0000000 { |
| compatible = "atmel,sama5d2-sdhci"; |
| reg = <0xa0000000 0x300>; |
| interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>; |
| clock-names = "hclock", "multclk", "baseclk"; |
| assigned-clocks = <&sdmmc0_gclk>; |
| assigned-clock-rates = <480000000>; |
| }; |