| /* SPDX-License-Identifier: GPL-2.0+ */ |
| |
| #ifndef __DT_BINDINGS_CLOCK_BCM63268_H |
| #define __DT_BINDINGS_CLOCK_BCM63268_H |
| |
| #define BCM63268_CLK_DIS_GLESS 0 |
| #define BCM63268_CLK_VDSL_QPROC 1 |
| #define BCM63268_CLK_VDSL_AFE 2 |
| #define BCM63268_CLK_VDSL 3 |
| #define BCM63268_CLK_MIPS 4 |
| #define BCM63268_CLK_WLAN_OCP 5 |
| #define BCM63268_CLK_DECT 6 |
| #define BCM63268_CLK_FAP0 7 |
| #define BCM63268_CLK_FAP1 8 |
| #define BCM63268_CLK_SAR 9 |
| #define BCM63268_CLK_ROBOSW 10 |
| #define BCM63268_CLK_PCM 11 |
| #define BCM63268_CLK_USBD 12 |
| #define BCM63268_CLK_USBH 13 |
| #define BCM63268_CLK_IPSEC 14 |
| #define BCM63268_CLK_SPI 15 |
| #define BCM63268_CLK_HSSPI 16 |
| #define BCM63268_CLK_PCIE 17 |
| #define BCM63268_CLK_PHYMIPS 18 |
| #define BCM63268_CLK_GMAC 19 |
| #define BCM63268_CLK_NAND 20 |
| #define BCM63268_CLK_TBUS 27 |
| #define BCM63268_CLK_ROBOSW250 31 |
| |
| #define BCM63268_TCLK_EPHY1 0 |
| #define BCM63268_TCLK_EPHY2 1 |
| #define BCM63268_TCLK_EPHY3 2 |
| #define BCM63268_TCLK_GPHY1 3 |
| #define BCM63268_TCLK_DSL 4 |
| #define BCM63268_TCLK_WAKEON_EPHY 6 |
| #define BCM63268_TCLK_WAKEON_DSL 7 |
| #define BCM63268_TCLK_FAP1 11 |
| #define BCM63268_TCLK_FAP2 15 |
| #define BCM63268_TCLK_UTO_50 16 |
| #define BCM63268_TCLK_UTO_EXTIN 17 |
| #define BCM63268_TCLK_USB_REF 18 |
| |
| #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */ |
