| // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| // |
| // Copyright 2016 Freescale Semiconductor, Inc. |
| |
| #include "imx6ul.dtsi" |
| #include "imx6ull-pinfunc.h" |
| #include "imx6ull-pinfunc-snvs.h" |
| |
| /* Delete UART8 in AIPS-1 (i.MX6UL specific) */ |
| /delete-node/ &uart8; |
| /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ |
| /delete-node/ &crypto; |
| |
| &cpu0 { |
| clock-frequency = <900000000>; |
| operating-points = < |
| /* kHz uV */ |
| 900000 1275000 |
| 792000 1225000 |
| 528000 1175000 |
| 396000 1025000 |
| 198000 950000 |
| >; |
| fsl,soc-operating-points = < |
| /* KHz uV */ |
| 900000 1250000 |
| 792000 1175000 |
| 528000 1175000 |
| 396000 1175000 |
| 198000 1175000 |
| >; |
| }; |
| |
| &ocotp { |
| compatible = "fsl,imx6ull-ocotp", "syscon"; |
| }; |
| |
| &pxp { |
| compatible = "fsl,imx6ull-pxp"; |
| interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &usdhc1 { |
| compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; |
| }; |
| |
| &usdhc2 { |
| compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; |
| }; |
| |
| / { |
| soc { |
| aips3: bus@2200000 { |
| compatible = "fsl,aips-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x02200000 0x100000>; |
| ranges; |
| |
| dcp: crypto@2280000 { |
| compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp"; |
| reg = <0x02280000 0x4000>; |
| interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clks IMX6ULL_CLK_DCP_CLK>; |
| clock-names = "dcp"; |
| }; |
| |
| iomuxc_snvs: iomuxc-snvs@2290000 { |
| compatible = "fsl,imx6ull-iomuxc-snvs"; |
| reg = <0x02290000 0x4000>; |
| }; |
| |
| uart8: serial@2288000 { |
| compatible = "fsl,imx6ul-uart", |
| "fsl,imx6q-uart"; |
| reg = <0x02288000 0x4000>; |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clks IMX6UL_CLK_UART8_IPG>, |
| <&clks IMX6UL_CLK_UART8_SERIAL>; |
| clock-names = "ipg", "per"; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| }; |