| NVIDIA Tegra Power Management Controller (PMC) |
| |
| Required properties: |
| - compatible: Should contain one of the following: |
| - "nvidia,tegra186-pmc": for Tegra186 |
| - "nvidia,tegra194-pmc": for Tegra194 |
| - "nvidia,tegra234-pmc": for Tegra234 |
| - reg: Must contain an (offset, length) pair of the register set for each |
| entry in reg-names. |
| - reg-names: Must include the following entries: |
| - "pmc" |
| - "wake" |
| - "aotag" |
| - "scratch" |
| - "misc" (Only for Tegra194 and later) |
| |
| Optional properties: |
| - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal. |
| - interrupt-controller: Identifies the node as an interrupt controller. |
| - #interrupt-cells: Specifies the number of cells needed to encode an |
| interrupt source. The value must be 2. |
| |
| Example: |
| |
| SoC DTSI: |
| |
| pmc@c3600000 { |
| compatible = "nvidia,tegra186-pmc"; |
| reg = <0 0x0c360000 0 0x10000>, |
| <0 0x0c370000 0 0x10000>, |
| <0 0x0c380000 0 0x10000>, |
| <0 0x0c390000 0 0x10000>; |
| reg-names = "pmc", "wake", "aotag", "scratch"; |
| }; |
| |
| Board DTS: |
| |
| pmc@c360000 { |
| nvidia,invert-interrupt; |
| }; |
| |
| == Pad Control == |
| |
| On Tegra SoCs a pad is a set of pins which are configured as a group. |
| The pin grouping is a fixed attribute of the hardware. The PMC can be |
| used to set pad power state and signaling voltage. A pad can be either |
| in active or power down mode. The support for power state and signaling |
| voltage configuration varies depending on the pad in question. 3.3 V and |
| 1.8 V signaling voltages are supported on pins where software |
| controllable signaling voltage switching is available. |
| |
| Pad configurations are described with pin configuration nodes which |
| are placed under the pmc node and they are referred to by the pinctrl |
| client properties. For more information see |
| Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. |
| |
| The following pads are present on Tegra186: |
| csia csib dsi mipi-bias |
| pex-clk-bias pex-clk3 pex-clk2 pex-clk1 |
| usb0 usb1 usb2 usb-bias |
| uart audio hsic dbg |
| hdmi-dp0 hdmi-dp1 pex-cntrl sdmmc2-hv |
| sdmmc4 cam dsib dsic |
| dsid csic csid csie |
| dsif spi ufs dmic-hv |
| edp sdmmc1-hv sdmmc3-hv conn |
| audio-hv ao-hv |
| |
| Required pin configuration properties: |
| - pins: A list of strings, each of which contains the name of a pad |
| to be configured. |
| |
| Optional pin configuration properties: |
| - low-power-enable: Configure the pad into power down mode |
| - low-power-disable: Configure the pad into active mode |
| - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or |
| TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. |
| The values are defined in |
| include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. |
| |
| Note: The power state can be configured on all of the above pads except |
| for ao-hv. Following pads have software configurable signaling |
| voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv, |
| ao-hv. |
| |
| Pad configuration state example: |
| pmc: pmc@7000e400 { |
| compatible = "nvidia,tegra186-pmc"; |
| reg = <0 0x0c360000 0 0x10000>, |
| <0 0x0c370000 0 0x10000>, |
| <0 0x0c380000 0 0x10000>, |
| <0 0x0c390000 0 0x10000>; |
| reg-names = "pmc", "wake", "aotag", "scratch"; |
| |
| ... |
| |
| sdmmc1_3v3: sdmmc1-3v3 { |
| pins = "sdmmc1-hv"; |
| power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; |
| }; |
| |
| sdmmc1_1v8: sdmmc1-1v8 { |
| pins = "sdmmc1-hv"; |
| power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; |
| }; |
| |
| hdmi_off: hdmi-off { |
| pins = "hdmi"; |
| low-power-enable; |
| } |
| |
| hdmi_on: hdmi-on { |
| pins = "hdmi"; |
| low-power-disable; |
| } |
| }; |
| |
| Pinctrl client example: |
| sdmmc1: sdhci@3400000 { |
| ... |
| pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; |
| pinctrl-0 = <&sdmmc1_3v3>; |
| pinctrl-1 = <&sdmmc1_1v8>; |
| }; |
| |
| ... |
| |
| sor0: sor@15540000 { |
| ... |
| pinctrl-0 = <&hdmi_off>; |
| pinctrl-1 = <&hdmi_on>; |
| pinctrl-names = "hdmi-on", "hdmi-off"; |
| }; |