| // SPDX-License-Identifier: ISC |
| /* |
| * Device Tree file for Linksys NSLU2 |
| */ |
| |
| /dts-v1/; |
| |
| #include "intel-ixp42x.dtsi" |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)"; |
| compatible = "linksys,nslu2", "intel,ixp42x"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| memory@0 { |
| /* 32 MB SDRAM */ |
| device_type = "memory"; |
| reg = <0x00000000 0x2000000>; |
| }; |
| |
| chosen { |
| bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait"; |
| stdout-path = "uart0:115200n8"; |
| }; |
| |
| aliases { |
| serial0 = &uart0; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| led-status { |
| label = "nslu2:red:status"; |
| gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; |
| default-state = "on"; |
| linux,default-trigger = "heartbeat"; |
| }; |
| led-ready { |
| label = "nslu2:green:ready"; |
| gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; |
| default-state = "on"; |
| }; |
| led-disk-1 { |
| label = "nslu2:green:disk-1"; |
| gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| led-disk-2 { |
| label = "nslu2:green:disk-2"; |
| gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| |
| button-power { |
| wakeup-source; |
| linux,code = <KEY_POWER>; |
| label = "power"; |
| gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; |
| }; |
| button-reset { |
| wakeup-source; |
| linux,code = <KEY_RESTART>; |
| label = "reset"; |
| gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| i2c { |
| compatible = "i2c-gpio"; |
| sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; |
| scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| rtc@6f { |
| compatible = "xicor,x1205"; |
| reg = <0x6f>; |
| }; |
| }; |
| |
| gpio-poweroff { |
| compatible = "gpio-poweroff"; |
| gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; |
| timeout-ms = <5000>; |
| }; |
| |
| gpio-beeper { |
| compatible = "gpio-beeper"; |
| gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| soc { |
| bus@c4000000 { |
| /* The first 16MB region at CS0 on the expansion bus */ |
| flash@0,0 { |
| compatible = "intel,ixp4xx-flash", "cfi-flash"; |
| bank-width = <2>; |
| /* Enable writes on the expansion bus */ |
| intel,ixp4xx-eb-write-enable = <1>; |
| /* |
| * 8 MB of Flash in 0x20000 byte blocks |
| * mapped in at CS0. |
| */ |
| reg = <0 0x00000000 0x800000>; |
| |
| partitions { |
| compatible = "redboot-fis"; |
| /* Eraseblock at 0x7e0000 */ |
| fis-index-block = <0x3f>; |
| }; |
| }; |
| }; |
| |
| pci@c0000000 { |
| status = "okay"; |
| |
| /* |
| * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant |
| * We have slots (IDSEL) 1, 2 and 3. |
| */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0xf800 0 0 7>; |
| interrupt-map = |
| /* IDSEL 1 */ |
| <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */ |
| <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */ |
| <0x0800 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */ |
| <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */ |
| /* IDSEL 2 */ |
| <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */ |
| <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */ |
| <0x1000 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 11 */ |
| <0x1000 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 8 */ |
| /* IDSEL 3 */ |
| <0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */ |
| <0x1800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 11 */ |
| <0x1800 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 10 */ |
| <0x1800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 3 is irq 8 */ |
| }; |
| |
| ethernet@c8009000 { |
| status = "okay"; |
| queue-rx = <&qmgr 3>; |
| queue-txready = <&qmgr 20>; |
| phy-mode = "rgmii"; |
| phy-handle = <&phy1>; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| phy1: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| }; |
| }; |
| }; |
| }; |