| # SPDX-License-Identifier: GPL-2.0-only |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm Global Clock & Reset Controller Binding for MSM8998 |
| |
| maintainers: |
| - Stephen Boyd <sboyd@kernel.org> |
| - Taniya Das <tdas@codeaurora.org> |
| |
| description: | |
| Qualcomm global clock control module which supports the clocks, resets and |
| power domains on MSM8998. |
| |
| See also: |
| - dt-bindings/clock/qcom,gcc-msm8998.h |
| |
| properties: |
| compatible: |
| const: qcom,gcc-msm8998 |
| |
| clocks: |
| items: |
| - description: Board XO source |
| - description: Sleep clock source |
| - description: USB 3.0 phy pipe clock |
| - description: UFS phy rx symbol clock for pipe 0 |
| - description: UFS phy rx symbol clock for pipe 1 |
| - description: UFS phy tx symbol clock |
| - description: PCIE phy pipe clock |
| |
| clock-names: |
| items: |
| - const: xo |
| - const: sleep_clk |
| - const: usb3_pipe |
| - const: ufs_rx_symbol0 |
| - const: ufs_rx_symbol1 |
| - const: ufs_tx_symbol0 |
| - const: pcie0_pipe |
| |
| '#clock-cells': |
| const: 1 |
| |
| '#reset-cells': |
| const: 1 |
| |
| '#power-domain-cells': |
| const: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| protected-clocks: |
| description: |
| Protected clock specifier list as per common clock binding. |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - reg |
| - '#clock-cells' |
| - '#reset-cells' |
| - '#power-domain-cells' |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,rpmcc.h> |
| clock-controller@100000 { |
| compatible = "qcom,gcc-msm8998"; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| #power-domain-cells = <1>; |
| reg = <0x00100000 0xb0000>; |
| clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, |
| <&sleep>, |
| <0>, |
| <0>, |
| <0>, |
| <0>, |
| <0>; |
| clock-names = "xo", |
| "sleep_clk", |
| "usb3_pipe", |
| "ufs_rx_symbol0", |
| "ufs_rx_symbol1", |
| "ufs_tx_symbol0", |
| "pcie0_pipe"; |
| }; |
| ... |