| //SPDX-License-Identifier: GPL-2.0 |
| /* Copyright (C) 2018 Octavo Systems LLC - https://www.octavosystems.com/ |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include "am33xx.dtsi" |
| #include "am335x-osd335x-common.dtsi" |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| #include <dt-bindings/display/tda998x.h> |
| |
| / { |
| model = "Octavo Systems OSD3358-SM-RED"; |
| compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; |
| }; |
| |
| &ldo3_reg { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| &mmc2 { |
| vmmc-supply = <&vmmcsd_fixed>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&emmc_pins>; |
| bus-width = <8>; |
| status = "okay"; |
| }; |
| |
| &lcdc { |
| status = "okay"; |
| |
| /* If you want to get 24 bit RGB and 16 BGR mode instead of |
| * current 16 bit RGB and 24 BGR modes, set the propety |
| * below to "crossed" and uncomment the video-ports -property |
| * in tda19988 node. |
| * AM335x errata for wiring: |
| * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf |
| */ |
| |
| blue-and-red-wiring = "straight"; |
| |
| port { |
| lcdc_0: endpoint { |
| remote-endpoint = <&hdmi_0>; |
| }; |
| }; |
| }; |
| |
| &i2c0 { |
| tda19988: hdmi-encoder@70 { |
| compatible = "nxp,tda998x"; |
| reg = <0x70>; |
| |
| pinctrl-names = "default", "off"; |
| pinctrl-0 = <&nxp_hdmi_bonelt_pins>; |
| pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; |
| |
| /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ |
| /* video-ports = <0x234501>; */ |
| |
| #sound-dai-cells = <0>; |
| audio-ports = < TDA998x_I2S 0x03>; |
| |
| port { |
| hdmi_0: endpoint { |
| remote-endpoint = <&lcdc_0>; |
| }; |
| }; |
| }; |
| |
| mpu9250: imu@68 { |
| compatible = "invensense,mpu6050"; |
| reg = <0x68>; |
| interrupt-parent = <&gpio3>; |
| interrupts = <21 IRQ_TYPE_EDGE_RISING>; |
| i2c-gate { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ax8975@c { |
| compatible = "ak,ak8975"; |
| reg = <0x0c>; |
| }; |
| }; |
| /*invensense,int_config = <0x10>; |
| invensense,level_shifter = <0>; |
| invensense,orientation = [01 00 00 00 01 00 00 00 01]; |
| invensense,sec_slave_type = <0>; |
| invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/ |
| }; |
| |
| bmp280: pressure@76 { |
| compatible = "bosch,bmp280"; |
| reg = <0x76>; |
| }; |
| }; |
| |
| &mcasp0 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcasp0_pins>; |
| status = "okay"; |
| op-mode = <0>; /* MCASP_IIS_MODE */ |
| tdm-slots = <2>; |
| serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 0 0 1 0 |
| >; |
| tx-num-evt = <32>; |
| rx-num-evt = <32>; |
| }; |
| |
| / { |
| clk_mcasp0_fixed: clk-mcasp0-fixed { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <24576000>; |
| }; |
| |
| clk_mcasp0: clk-mcasp0 { |
| #clock-cells = <0>; |
| compatible = "gpio-gate-clock"; |
| clocks = <&clk_mcasp0_fixed>; |
| enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ |
| }; |
| |
| sound { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "TI BeagleBone Black"; |
| simple-audio-card,format = "i2s"; |
| simple-audio-card,bitclock-master = <&dailink0_master>; |
| simple-audio-card,frame-master = <&dailink0_master>; |
| |
| dailink0_master: simple-audio-card,cpu { |
| sound-dai = <&mcasp0>; |
| clocks = <&clk_mcasp0>; |
| }; |
| |
| simple-audio-card,codec { |
| sound-dai = <&tda19988>; |
| }; |
| }; |
| |
| chosen { |
| stdout-path = &uart0; |
| }; |
| |
| leds { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&user_leds_s0>; |
| |
| compatible = "gpio-leds"; |
| |
| led2 { |
| label = "beaglebone:green:usr0"; |
| gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| default-state = "off"; |
| }; |
| |
| led3 { |
| label = "beaglebone:green:usr1"; |
| gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "mmc0"; |
| default-state = "off"; |
| }; |
| |
| led4 { |
| label = "beaglebone:green:usr2"; |
| gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "cpu0"; |
| default-state = "off"; |
| }; |
| |
| led5 { |
| label = "beaglebone:green:usr3"; |
| gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "mmc1"; |
| default-state = "off"; |
| }; |
| }; |
| |
| vmmcsd_fixed: fixedregulator0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmcsd_fixed"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &am33xx_pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&clkout2_pin>; |
| |
| nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) |
| >; |
| }; |
| |
| mcasp0_pins: mcasp0-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ |
| >; |
| }; |
| |
| flash_enable: flash-enable { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */ |
| >; |
| }; |
| |
| imu_interrupt: imu-interrupt { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */ |
| >; |
| }; |
| |
| ethernet_interrupt: ethernet-interrupt{ |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */ |
| >; |
| }; |
| |
| user_leds_s0: user-leds-s0 { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
| >; |
| }; |
| |
| i2c2_pins: pinmux-i2c2-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ |
| AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ |
| >; |
| }; |
| |
| uart0_pins: pinmux-uart0-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| clkout2_pin: pinmux-clkout2-pin { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
| >; |
| }; |
| |
| cpsw_default: cpsw-default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) |
| >; |
| }; |
| |
| cpsw_sleep: cpsw-sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci-mdio-default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci-mdio-sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| mmc1_pins: pinmux-mmc1-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| emmc_pins: pinmux-emmc-pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ |
| >; |
| }; |
| }; |
| |
| |
| &uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart0_pins>; |
| |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| dr_mode = "peripheral"; |
| interrupts-extended = <&intc 18 &tps 0>; |
| interrupt-names = "mc", "vbus"; |
| }; |
| |
| &usb1 { |
| dr_mode = "host"; |
| }; |
| |
| &i2c2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_pins>; |
| status = "okay"; |
| clock-frequency = <100000>; |
| }; |
| |
| &cpsw_port1 { |
| phy-handle = <ðphy0>; |
| phy-mode = "rgmii-txid"; |
| ti,dual-emac-pvid = <1>; |
| }; |
| |
| &cpsw_port2 { |
| status = "disabled"; |
| }; |
| |
| &mac_sw { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| status = "okay"; |
| }; |
| |
| &davinci_mdio_sw { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| |
| ethphy0: ethernet-phy@4 { |
| reg = <4>; |
| }; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| vmmc-supply = <&vmmcsd_fixed>; |
| bus-width = <0x4>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &rtc { |
| system-power-controller; |
| clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; |
| clock-names = "ext-clk", "int-clk"; |
| }; |
