| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Device Tree file for DB-DXBC2 board |
| * |
| * Copyright (C) 2016 Allied Telesis Labs |
| * |
| * Based on armada-xp-db.dts |
| * |
| * Note: this Device Tree assumes that the bootloader has remapped the |
| * internal registers to 0xf1000000 (instead of the default |
| * 0xd0000000). The 0xf1000000 is the default used by the recent, |
| * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier |
| * boards were delivered with an older version of the bootloader that |
| * left internal registers mapped at 0xd0000000. If you are in this |
| * situation, you should either update your bootloader (preferred |
| * solution) or the below Device Tree should be adjusted. |
| */ |
| |
| /dts-v1/; |
| #include "armada-xp-98dx4251.dtsi" |
| |
| / { |
| model = "Marvell Bobcat2 Evaluation Board"; |
| compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp"; |
| |
| chosen { |
| bootargs = "console=ttyS0,115200 earlyprintk"; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ |
| }; |
| |
| }; |
| |
| &devbus_bootcs { |
| status = "okay"; |
| |
| /* Device Bus parameters are required */ |
| |
| /* Read parameters */ |
| devbus,bus-width = <16>; |
| devbus,turn-off-ps = <60000>; |
| devbus,badr-skew-ps = <0>; |
| devbus,acc-first-ps = <124000>; |
| devbus,acc-next-ps = <248000>; |
| devbus,rd-setup-ps = <0>; |
| devbus,rd-hold-ps = <0>; |
| |
| /* Write parameters */ |
| devbus,sync-enable = <0>; |
| devbus,wr-high-ps = <60000>; |
| devbus,wr-low-ps = <60000>; |
| devbus,ale-wr-ps = <60000>; |
| }; |
| |
| &i2c0 { |
| clock-frequency = <100000>; |
| status = "okay"; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| status = "okay"; |
| }; |
| |
| &nand_controller { |
| status = "okay"; |
| |
| nand@0 { |
| reg = <0>; |
| label = "pxa3xx_nand-0"; |
| nand-rb = <0>; |
| marvell,nand-keep-config; |
| nand-on-flash-bbt; |
| nand-ecc-strength = <4>; |
| nand-ecc-step-size = <512>; |
| }; |
| }; |
| |
| &sdio { |
| pinctrl-0 = <&sdio_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| /* No CD or WP GPIOs */ |
| broken-cd; |
| }; |
| |
| &spi0 { |
| status = "okay"; |
| |
| spi-flash@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "m25p64"; |
| reg = <0>; /* Chip select 0 */ |
| spi-max-frequency = <20000000>; |
| m25p,fast-read; |
| |
| partition@u-boot { |
| reg = <0x00000000 0x00100000>; |
| label = "u-boot"; |
| }; |
| partition@u-boot-env { |
| reg = <0x00100000 0x00040000>; |
| label = "u-boot-env"; |
| }; |
| partition@unused { |
| reg = <0x00140000 0x00ec0000>; |
| label = "unused"; |
| }; |
| |
| }; |
| }; |