| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Support for Variscite DART-MX6 Module |
| * |
| * Copyright 2017 BayLibre, SAS |
| * Author: Neil Armstrong <narmstrong@baylibre.com> |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/sound/fsl-imx-audmux.h> |
| |
| / { |
| memory@10000000 { |
| device_type = "memory"; |
| reg = <0x10000000 0x40000000>; |
| }; |
| |
| reg_3p3v: regulator-3p3v { |
| compatible = "regulator-fixed"; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_wl18xx_vmmc: regulator-wl18xx { |
| compatible = "regulator-fixed"; |
| regulator-name = "vwl1807"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| startup-delay-us = <70000>; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux>; |
| status = "okay"; |
| |
| ssi2 { |
| fsl,audmux-port = <1>; |
| fsl,port-config = < |
| (IMX_AUDMUX_V2_PTCR_SYN | |
| IMX_AUDMUX_V2_PTCR_TFSDIR | |
| IMX_AUDMUX_V2_PTCR_TFSEL(2) | |
| IMX_AUDMUX_V2_PTCR_TCLKDIR | |
| IMX_AUDMUX_V2_PTCR_TCSEL(2)) |
| IMX_AUDMUX_V2_PDCR_RXDSEL(2) |
| >; |
| }; |
| |
| aud3 { |
| fsl,audmux-port = <2>; |
| fsl,port-config = < |
| IMX_AUDMUX_V2_PTCR_SYN |
| IMX_AUDMUX_V2_PDCR_RXDSEL(1) |
| >; |
| }; |
| }; |
| |
| &can1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan1>; |
| status = "disabled"; |
| }; |
| |
| &can2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_flexcan2>; |
| status = "disabled"; |
| }; |
| |
| &ecspi1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1>; |
| status = "disabled"; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii"; |
| status = "disabled"; |
| }; |
| |
| &hdmi { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hdmicec>; |
| ddc-i2c-bus = <&i2c1>; |
| status = "disabled"; |
| }; |
| |
| &i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| status = "disabled"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| status = "okay"; |
| |
| pmic@8 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pmic>; |
| compatible = "fsl,pfuze100"; |
| reg = <0x08>; |
| |
| regulators { |
| sw1a_reg: sw1ab { |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1875000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| sw1c_reg: sw1c { |
| regulator-min-microvolt = <300000>; |
| regulator-max-microvolt = <1875000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <6250>; |
| }; |
| |
| sw2_reg: sw2 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3a_reg: sw3a { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3950000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw3b_reg: sw3b { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3950000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| sw4_reg: sw4 { |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <3950000>; |
| }; |
| |
| snvs_reg: vsnvs { |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vref_reg: vrefddr { |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vgen6_reg: vgen6 { |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| }; |
| }; |
| |
| tlv320aic3106: codec@1b { |
| compatible = "ti,tlv320aic3106"; |
| reg = <0x1b>; |
| #sound-dai-cells = <0>; |
| DRVDD-supply = <®_3p3v>; |
| AVDD-supply = <®_3p3v>; |
| IOVDD-supply = <®_3p3v>; |
| DVDD-supply = <®_3p3v>; |
| ai3x-ocmv = <0>; |
| reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| &i2c3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| status = "disabled"; |
| }; |
| |
| &iomuxc { |
| pinctrl_audmux: audmux { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
| MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 |
| MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 |
| MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 |
| /* Audio Clock */ |
| MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 |
| >; |
| }; |
| |
| pinctrl_bt: bt { |
| fsl,pins = < |
| /* Bluetooth enable */ |
| MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 |
| /* Bluetooth Slow Clock */ |
| MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 |
| >; |
| }; |
| |
| pinctrl_ecspi1: ecspi1grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 |
| MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 |
| MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 |
| /* SPI1 CS0 */ |
| MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 |
| /* SPI1 CS1 */ |
| MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
| >; |
| }; |
| |
| pinctrl_flexcan1: flexcan1grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 |
| MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_flexcan2: flexcan2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 |
| MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_hdmicec: hdmicecgrp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 |
| MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 |
| MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_pmic: pmicgrp { |
| fsl,pins = < |
| /* PMIC INT */ |
| MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_pwm2: pwm2grp { |
| fsl,pins = < |
| MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 |
| MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart3: uart3grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 |
| MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc1: usdhc1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 |
| MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 |
| MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 |
| MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 |
| MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 |
| MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 |
| /* WL_EN */ |
| MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071 |
| /* WL_IRQ */ |
| MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071 |
| >; |
| }; |
| |
| pinctrl_usdhc1_100mhz: usdhc1grp100mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9 |
| MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9 |
| MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9 |
| MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9 |
| MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9 |
| MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9 |
| >; |
| }; |
| |
| pinctrl_usdhc1_200mhz: usdhc1grp200mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9 |
| MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9 |
| MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9 |
| MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9 |
| MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9 |
| MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| >; |
| }; |
| }; |
| |
| &pcie { |
| fsl,tx-swing-full = <103>; |
| fsl,tx-swing-low = <103>; |
| reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; |
| status = "disabled"; |
| }; |
| |
| &pwm2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm2>; |
| status = "disabled"; |
| }; |
| |
| ®_arm { |
| vin-supply = <&sw1a_reg>; |
| }; |
| |
| ®_pu { |
| vin-supply = <&sw1c_reg>; |
| }; |
| |
| ®_soc { |
| vin-supply = <&sw1c_reg>; |
| }; |
| |
| &snvs_poweroff { |
| status = "okay"; |
| }; |
| |
| &ssi2 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "disabled"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; |
| uart-has-rtscts; |
| status = "okay"; |
| |
| bluetooth { |
| compatible = "ti,wl1835-st"; |
| enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| &uart3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart3>; |
| uart-has-rtscts; |
| status = "disabled"; |
| }; |
| |
| &usbh1 { |
| status = "disabled"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| status = "disabled"; |
| }; |
| |
| &usdhc1 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc1>; |
| pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
| bus-width = <4>; |
| vmmc-supply = <®_wl18xx_vmmc>; |
| non-removable; |
| wakeup-source; |
| keep-power-in-suspend; |
| cap-power-off-card; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| |
| wlcore: wlcore@2 { |
| compatible = "ti,wl1835"; |
| reg = <2>; |
| interrupt-parent = <&gpio6>; |
| interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; |
| ref-clock-frequency = <38400000>; |
| }; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc2>; |
| no-1-8-v; |
| keep-power-in-suspend; |
| wakeup-source; |
| status = "disabled"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc3>; |
| non-removable; |
| keep-power-in-suspend; |
| wakeup-source; |
| status = "okay"; |
| }; |
