| // SPDX-License-Identifier: GPL-2.0 |
| #include <dt-bindings/mfd/max77620.h> |
| |
| #include "tegra210.dtsi" |
| |
| / { |
| model = "NVIDIA Jetson TX1"; |
| compatible = "nvidia,p2180", "nvidia,tegra210"; |
| |
| aliases { |
| rtc0 = "/i2c@7000d000/pmic@3c"; |
| rtc1 = "/rtc@7000e000"; |
| serial0 = &uarta; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x0 0x80000000 0x1 0x0>; |
| }; |
| |
| gpu@57000000 { |
| vdd-supply = <&vdd_gpu>; |
| }; |
| |
| /* debug port */ |
| serial@70006000 { |
| /delete-property/ dmas; |
| /delete-property/ dma-names; |
| status = "okay"; |
| }; |
| |
| serial@70006300 { |
| /delete-property/ reg-shift; |
| status = "okay"; |
| compatible = "nvidia,tegra30-hsuart"; |
| reset-names = "serial"; |
| |
| bluetooth { |
| compatible = "brcm,bcm43540-bt"; |
| device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; |
| shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; |
| interrupt-names = "host-wakeup"; |
| }; |
| }; |
| |
| i2c@7000c400 { |
| status = "okay"; |
| |
| power-sensor@40 { |
| compatible = "ti,ina3221"; |
| reg = <0x40>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| input@0 { |
| reg = <0x0>; |
| label = "VDD_IN"; |
| shunt-resistor-micro-ohms = <20000>; |
| }; |
| |
| input@1 { |
| reg = <0x1>; |
| label = "VDD_GPU"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| |
| input@2 { |
| reg = <0x2>; |
| label = "VDD_CPU"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| }; |
| }; |
| |
| i2c@7000c500 { |
| status = "okay"; |
| |
| /* module ID EEPROM */ |
| eeprom@50 { |
| compatible = "atmel,24c02"; |
| reg = <0x50>; |
| |
| label = "module"; |
| vcc-supply = <&vdd_1v8>; |
| address-width = <8>; |
| pagesize = <8>; |
| size = <256>; |
| read-only; |
| }; |
| }; |
| |
| i2c@7000d000 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pmic: pmic@3c { |
| compatible = "maxim,max77620"; |
| reg = <0x3c>; |
| interrupt-parent = <&tegra_pmc>; |
| interrupts = <51 IRQ_TYPE_LEVEL_LOW>; |
| |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&max77620_default>; |
| |
| fps { |
| fps0 { |
| maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; |
| maxim,suspend-fps-time-period-us = <1280>; |
| }; |
| |
| fps1 { |
| maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; |
| maxim,suspend-fps-time-period-us = <1280>; |
| }; |
| |
| fps2 { |
| maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; |
| }; |
| }; |
| |
| max77620_default: pinmux { |
| gpio0 { |
| pins = "gpio0"; |
| function = "gpio"; |
| }; |
| |
| gpio1 { |
| pins = "gpio1"; |
| function = "fps-out"; |
| drive-push-pull = <1>; |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| maxim,active-fps-power-up-slot = <7>; |
| maxim,active-fps-power-down-slot = <0>; |
| }; |
| |
| gpio2_3 { |
| pins = "gpio2", "gpio3"; |
| function = "fps-out"; |
| drive-open-drain = <1>; |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| }; |
| |
| gpio4 { |
| pins = "gpio4"; |
| function = "32k-out1"; |
| }; |
| |
| gpio5_6_7 { |
| pins = "gpio5", "gpio6", "gpio7"; |
| function = "gpio"; |
| drive-push-pull = <1>; |
| }; |
| }; |
| |
| regulators { |
| in-ldo0-1-supply = <&vdd_pre>; |
| in-ldo7-8-supply = <&vdd_pre>; |
| in-sd3-supply = <&vdd_5v0_sys>; |
| |
| vdd_soc: sd0 { |
| regulator-name = "VDD_SOC"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1400000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <146>; |
| regulator-ramp-delay = <27500>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| }; |
| |
| vdd_ddr: sd1 { |
| regulator-name = "VDD_DDR_1V1_PMIC"; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <130>; |
| regulator-ramp-delay = <27500>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| }; |
| |
| vdd_pre: sd2 { |
| regulator-name = "VDD_PRE_REG_1V35"; |
| regulator-min-microvolt = <1350000>; |
| regulator-max-microvolt = <1350000>; |
| |
| regulator-enable-ramp-delay = <176>; |
| regulator-ramp-delay = <27500>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| }; |
| |
| vdd_1v8: sd3 { |
| regulator-name = "VDD_1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <242>; |
| regulator-ramp-delay = <27500>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| }; |
| |
| vdd_sys_1v2: ldo0 { |
| regulator-name = "AVDD_SYS_1V2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <26>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| }; |
| |
| vdd_pex_1v05: ldo1 { |
| regulator-name = "VDD_PEX_1V05"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| |
| regulator-enable-ramp-delay = <22>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| }; |
| |
| vddio_sdmmc: ldo2 { |
| regulator-name = "VDDIO_SDMMC"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <62>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| }; |
| |
| vdd_cam_hv: ldo3 { |
| regulator-name = "VDD_CAM_HV"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| |
| regulator-enable-ramp-delay = <50>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| }; |
| |
| vdd_rtc: ldo4 { |
| regulator-name = "VDD_RTC"; |
| regulator-min-microvolt = <850000>; |
| regulator-max-microvolt = <850000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <22>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| }; |
| |
| vdd_ts_hv: ldo5 { |
| regulator-name = "VDD_TS_HV"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| regulator-enable-ramp-delay = <62>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; |
| }; |
| |
| vdd_ts: ldo6 { |
| regulator-name = "VDD_TS_1V8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| regulator-enable-ramp-delay = <36>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_0>; |
| maxim,active-fps-power-up-slot = <7>; |
| maxim,active-fps-power-down-slot = <0>; |
| }; |
| |
| avdd_1v05_pll: ldo7 { |
| regulator-name = "AVDD_1V05_PLL"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| regulator-always-on; |
| regulator-boot-on; |
| |
| regulator-enable-ramp-delay = <24>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| }; |
| |
| avdd_1v05: ldo8 { |
| regulator-name = "AVDD_SATA_HDMI_DP_1V05"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| |
| regulator-enable-ramp-delay = <22>; |
| regulator-ramp-delay = <100000>; |
| |
| maxim,active-fps-source = <MAX77620_FPS_SRC_1>; |
| }; |
| }; |
| }; |
| }; |
| |
| pmc@7000e400 { |
| nvidia,invert-interrupt; |
| nvidia,suspend-mode = <0>; |
| nvidia,cpu-pwr-good-time = <0>; |
| nvidia,cpu-pwr-off-time = <0>; |
| nvidia,core-pwr-good-time = <4587 3876>; |
| nvidia,core-pwr-off-time = <39065>; |
| nvidia,core-power-req-active-high; |
| nvidia,sys-clock-req-active-high; |
| }; |
| |
| mmc@700b0200 { |
| status = "okay"; |
| bus-width = <4>; |
| non-removable; |
| power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; |
| vqmmc-supply = <&vdd_1v8>; |
| vmmc-supply = <&vdd_3v3_sys>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| wifi@1 { |
| compatible = "brcm,bcm4354-fmac"; |
| reg = <1>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "host-wake"; |
| }; |
| }; |
| |
| /* eMMC */ |
| mmc@700b0600 { |
| status = "okay"; |
| bus-width = <8>; |
| non-removable; |
| vqmmc-supply = <&vdd_1v8>; |
| }; |
| |
| clk32k_in: clock-32k { |
| compatible = "fixed-clock"; |
| clock-frequency = <32768>; |
| #clock-cells = <0>; |
| }; |
| |
| cpus { |
| cpu@0 { |
| enable-method = "psci"; |
| }; |
| |
| cpu@1 { |
| enable-method = "psci"; |
| }; |
| |
| cpu@2 { |
| enable-method = "psci"; |
| }; |
| |
| cpu@3 { |
| enable-method = "psci"; |
| }; |
| |
| idle-states { |
| cpu-sleep { |
| status = "okay"; |
| }; |
| }; |
| }; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| vdd_gpu: regulator-vdd-gpu { |
| compatible = "pwm-regulator"; |
| pwms = <&pwm 1 8000>; |
| regulator-name = "VDD_GPU"; |
| regulator-min-microvolt = <710000>; |
| regulator-max-microvolt = <1320000>; |
| enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; |
| regulator-ramp-delay = <80>; |
| regulator-enable-ramp-delay = <2000>; |
| regulator-settling-time-us = <160>; |
| }; |
| }; |
