| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Copyright (c) 2020-2021, Linaro Limited |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| #include "sm8350.dtsi" |
| #include "pm8350.dtsi" |
| #include "pm8350b.dtsi" |
| #include "pm8350c.dtsi" |
| #include "pmk8350.dtsi" |
| #include "pmr735a.dtsi" |
| #include "pmr735b.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. SM8350 HDK"; |
| compatible = "qcom,sm8350-hdk", "qcom,sm8350"; |
| chassis-type = "embedded"; |
| |
| aliases { |
| serial0 = &uart2; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| hdmi-connector { |
| compatible = "hdmi-connector"; |
| type = "a"; |
| |
| port { |
| hdmi_con: endpoint { |
| remote-endpoint = <<9611_out>; |
| }; |
| }; |
| }; |
| |
| pmic-glink { |
| compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; |
| |
| connector@0 { |
| compatible = "usb-c-connector"; |
| reg = <0>; |
| power-role = "dual"; |
| data-role = "dual"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| pmic_glink_hs_in: endpoint { |
| remote-endpoint = <&usb_1_dwc3_hs>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| pmic_glink_ss_in: endpoint { |
| remote-endpoint = <&usb_1_qmpphy_out>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| pmic_glink_sbu: endpoint { |
| remote-endpoint = <&fsa4480_sbu_mux>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| vph_pwr: vph-pwr-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "vph_pwr"; |
| regulator-min-microvolt = <3700000>; |
| regulator-max-microvolt = <3700000>; |
| |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| lt9611_1v2: lt9611-1v2-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "LT9611_1V2"; |
| |
| vin-supply = <&vph_pwr>; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| regulator-boot-on; |
| }; |
| |
| lt9611_3v3: lt9611-3v3-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "LT9611_3V3"; |
| |
| vin-supply = <&vreg_bob>; |
| gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| enable-active-high; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| |
| &adsp { |
| status = "okay"; |
| firmware-name = "qcom/sm8350/adsp.mbn"; |
| }; |
| |
| &apps_rsc { |
| regulators-0 { |
| compatible = "qcom,pm8350-rpmh-regulators"; |
| qcom,pmic-id = "b"; |
| |
| vdd-s1-supply = <&vph_pwr>; |
| vdd-s2-supply = <&vph_pwr>; |
| vdd-s3-supply = <&vph_pwr>; |
| vdd-s4-supply = <&vph_pwr>; |
| vdd-s5-supply = <&vph_pwr>; |
| vdd-s6-supply = <&vph_pwr>; |
| vdd-s7-supply = <&vph_pwr>; |
| vdd-s8-supply = <&vph_pwr>; |
| vdd-s9-supply = <&vph_pwr>; |
| vdd-s10-supply = <&vph_pwr>; |
| vdd-s11-supply = <&vph_pwr>; |
| vdd-s12-supply = <&vph_pwr>; |
| |
| vdd-l1-l4-supply = <&vreg_s11b_0p95>; |
| vdd-l2-l7-supply = <&vreg_bob>; |
| vdd-l3-l5-supply = <&vreg_bob>; |
| vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; |
| |
| vreg_s10b_1p8: smps10 { |
| regulator-name = "vreg_s10b_1p8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_s11b_0p95: smps11 { |
| regulator-name = "vreg_s11b_0p95"; |
| regulator-min-microvolt = <952000>; |
| regulator-max-microvolt = <952000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_s12b_1p25: smps12 { |
| regulator-name = "vreg_s12b_1p25"; |
| regulator-min-microvolt = <1256000>; |
| regulator-max-microvolt = <1256000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l1b_0p88: ldo1 { |
| regulator-name = "vreg_l1b_0p88"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <920000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l2b_3p07: ldo2 { |
| regulator-name = "vreg_l2b_3p07"; |
| regulator-min-microvolt = <3072000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l3b_0p9: ldo3 { |
| regulator-name = "vreg_l3b_0p9"; |
| regulator-min-microvolt = <904000>; |
| regulator-max-microvolt = <904000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l5b_0p88: ldo5 { |
| regulator-name = "vreg_l5b_0p88"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <888000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l6b_1p2: ldo6 { |
| regulator-name = "vreg_l6b_1p2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1208000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7b_2p96: ldo7 { |
| regulator-name = "vreg_l7b_2p96"; |
| regulator-min-microvolt = <2504000>; |
| regulator-max-microvolt = <2504000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l9b_1p2: ldo9 { |
| regulator-name = "vreg_l9b_1p2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-1 { |
| compatible = "qcom,pm8350c-rpmh-regulators"; |
| qcom,pmic-id = "c"; |
| |
| vdd-s1-supply = <&vph_pwr>; |
| vdd-s2-supply = <&vph_pwr>; |
| vdd-s3-supply = <&vph_pwr>; |
| vdd-s4-supply = <&vph_pwr>; |
| vdd-s5-supply = <&vph_pwr>; |
| vdd-s6-supply = <&vph_pwr>; |
| vdd-s7-supply = <&vph_pwr>; |
| vdd-s8-supply = <&vph_pwr>; |
| vdd-s9-supply = <&vph_pwr>; |
| vdd-s10-supply = <&vph_pwr>; |
| |
| vdd-l1-l12-supply = <&vreg_s1c_1p86>; |
| vdd-l2-l8-supply = <&vreg_s1c_1p86>; |
| vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; |
| vdd-l6-l9-l11-supply = <&vreg_bob>; |
| vdd-l10-supply = <&vreg_s12b_1p25>; |
| |
| vdd-bob-supply = <&vph_pwr>; |
| |
| vreg_s1c_1p86: smps1 { |
| regulator-name = "vreg_s1c_1p86"; |
| regulator-min-microvolt = <1856000>; |
| regulator-max-microvolt = <1880000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_bob: bob { |
| regulator-name = "vreg_bob"; |
| regulator-min-microvolt = <3008000>; |
| regulator-max-microvolt = <3960000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; |
| }; |
| |
| vreg_l1c_1p8: ldo1 { |
| regulator-name = "vreg_l1c_1p8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l2c_1p8: ldo2 { |
| regulator-name = "vreg_l2c_1p8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l6c_1p8: ldo6 { |
| regulator-name = "vreg_l6c_1p8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2960000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l9c_2p96: ldo9 { |
| regulator-name = "vreg_l9c_2p96"; |
| regulator-min-microvolt = <2960000>; |
| regulator-max-microvolt = <3008000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l10c_1p2: ldo10 { |
| regulator-name = "vreg_l10c_1p2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-2 { |
| compatible = "qcom,pmr735a-rpmh-regulators"; |
| qcom,pmic-id = "e"; |
| |
| vdd-s1-supply = <&vph_pwr>; |
| vdd-s2-supply = <&vph_pwr>; |
| vdd-s3-supply = <&vph_pwr>; |
| |
| vdd-l1-l2-supply = <&vreg_s2e_0p85>; |
| vdd-l3-supply = <&vreg_s1e_1p25>; |
| vdd-l4-supply = <&vreg_s1c_1p86>; |
| vdd-l5-l6-supply = <&vreg_s1c_1p86>; |
| vdd-l7-bob-supply = <&vreg_bob>; |
| |
| vreg_s1e_1p25: smps1 { |
| regulator-name = "vreg_s1e_1p25"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1280000>; |
| }; |
| |
| vreg_s2e_0p85: smps2 { |
| regulator-name = "vreg_s2e_0p85"; |
| regulator-min-microvolt = <950000>; |
| regulator-max-microvolt = <976000>; |
| }; |
| |
| vreg_s3e_2p20: smps3 { |
| regulator-name = "vreg_s3e_2p20"; |
| regulator-min-microvolt = <2200000>; |
| regulator-max-microvolt = <2352000>; |
| }; |
| |
| vreg_l1e_0p9: ldo1 { |
| regulator-name = "vreg_l1e_0p9"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| }; |
| |
| vreg_l2e_1p2: ldo2 { |
| regulator-name = "vreg_l2e_0p8"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| vreg_l3e_1p2: ldo3 { |
| regulator-name = "vreg_l3e_1p2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| vreg_l4e_1p7: ldo4 { |
| regulator-name = "vreg_l4e_1p7"; |
| regulator-min-microvolt = <1776000>; |
| regulator-max-microvolt = <1872000>; |
| }; |
| |
| vreg_l5e_0p8: ldo5 { |
| regulator-name = "vreg_l5e_0p8"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <800000>; |
| }; |
| |
| vreg_l6e_0p8: ldo6 { |
| regulator-name = "vreg_l6e_0p8"; |
| regulator-min-microvolt = <480000>; |
| regulator-max-microvolt = <904000>; |
| }; |
| |
| vreg_l7e_2p8: ldo7 { |
| regulator-name = "vreg_l7e_2p8"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| }; |
| }; |
| |
| &cdsp { |
| status = "okay"; |
| firmware-name = "qcom/sm8350/cdsp.mbn"; |
| }; |
| |
| &dispcc { |
| status = "okay"; |
| }; |
| |
| &mdss_dsi0 { |
| vdda-supply = <&vreg_l6b_1p2>; |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| endpoint { |
| remote-endpoint = <<9611_a>; |
| data-lanes = <0 1 2 3>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss_dsi0_phy { |
| vdds-supply = <&vreg_l5b_0p88>; |
| status = "okay"; |
| }; |
| |
| &gpi_dma1 { |
| status = "okay"; |
| }; |
| |
| &gpu { |
| status = "okay"; |
| |
| zap-shader { |
| firmware-name = "qcom/sm8350/a660_zap.mbn"; |
| }; |
| }; |
| |
| &i2c13 { |
| clock-frequency = <100000>; |
| |
| status = "okay"; |
| |
| typec-mux@42 { |
| compatible = "fcs,fsa4480"; |
| reg = <0x42>; |
| |
| interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; |
| |
| vcc-supply = <&vreg_bob>; |
| mode-switch; |
| orientation-switch; |
| |
| port { |
| fsa4480_sbu_mux: endpoint { |
| remote-endpoint = <&pmic_glink_sbu>; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c15 { |
| clock-frequency = <400000>; |
| status = "okay"; |
| |
| lt9611_codec: hdmi-bridge@2b { |
| compatible = "lontium,lt9611uxc"; |
| reg = <0x2b>; |
| |
| interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; |
| reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; |
| |
| vdd-supply = <<9611_1v2>; |
| vcc-supply = <<9611_3v3>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <<9611_state>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| lt9611_a: endpoint { |
| remote-endpoint = <&mdss_dsi0_out>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| lt9611_out: endpoint { |
| remote-endpoint = <&hdmi_con>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss { |
| status = "okay"; |
| }; |
| |
| &mdss_dp { |
| status = "okay"; |
| }; |
| |
| &mdss_dp_out { |
| data-lanes = <0 1>; |
| }; |
| |
| &mpss { |
| status = "okay"; |
| firmware-name = "qcom/sm8350/modem.mbn"; |
| }; |
| |
| &pcie0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie0_default_state>; |
| |
| perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie0_phy { |
| vdda-phy-supply = <&vreg_l5b_0p88>; |
| vdda-pll-supply = <&vreg_l6b_1p2>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie1 { |
| perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie1_default_state>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie1_phy { |
| status = "okay"; |
| vdda-phy-supply = <&vreg_l5b_0p88>; |
| vdda-pll-supply = <&vreg_l6b_1p2>; |
| }; |
| |
| &qupv3_id_0 { |
| status = "okay"; |
| }; |
| |
| &qupv3_id_1 { |
| status = "okay"; |
| }; |
| |
| &qupv3_id_2 { |
| status = "okay"; |
| }; |
| |
| &sdhc_2 { |
| cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; |
| pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; |
| vmmc-supply = <&vreg_l9c_2p96>; |
| vqmmc-supply = <&vreg_l6c_1p8>; |
| no-sdio; |
| no-mmc; |
| status = "okay"; |
| }; |
| |
| &slpi { |
| status = "okay"; |
| firmware-name = "qcom/sm8350/slpi.mbn"; |
| }; |
| |
| &tlmm { |
| gpio-reserved-ranges = <52 8>; |
| |
| gpio-line-names = |
| "APPS_I2C_SDA", /* GPIO_0 */ |
| "APPS_I2C_SCL", |
| "FSA_INT_N", |
| "USER_LED3_EN", |
| "SMBUS_SDA_1P8", |
| "SMBUS_SCL_1P8", |
| "2M2_3P3_EN", |
| "ALERT_DUAL_M2_N", |
| "EXP_UART_CTS", |
| "EXP_UART_RFR", |
| "EXP_UART_TX", /* GPIO_10 */ |
| "EXP_UART_RX", |
| "NC", |
| "NC", |
| "RCM_MARKER1", |
| "WSA0_EN", |
| "CAM1_RESET_N", |
| "CAM0_RESET_N", |
| "DEBUG_UART_TX", |
| "DEBUG_UART_RX", |
| "TS_I2C_SDA", /* GPIO_20 */ |
| "TS_I2C_SCL", |
| "TS_RESET_N", |
| "TS_INT_N", |
| "DISP0_RESET_N", |
| "DISP1_RESET_N", |
| "ETH_RESET", |
| "RCM_MARKER2", |
| "CAM_DC_MIPI_MUX_EN", |
| "CAM_DC_MIPI_MUX_SEL", |
| "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ |
| "AFC_PHY_TA_D_MINUS", |
| "PM8008_1_IRQ", |
| "PM8008_1_RESET_N", |
| "PM8008_2_IRQ", |
| "PM8008_2_RESET_N", |
| "CAM_DC_I3C_SDA", |
| "CAM_DC_I3C_SCL", |
| "FP_INT_N", |
| "FP_WUHB_INT_N", |
| "SMB_SPMI_DATA", /* GPIO_40 */ |
| "SMB_SPMI_CLK", |
| "USB_HUB_RESET", |
| "FORCE_USB_BOOT", |
| "LRF_IRQ", |
| "NC", |
| "IMU2_INT", |
| "HDMI_3P3_EN", |
| "HDMI_RSTN", |
| "HDMI_1P2_EN", |
| "HDMI_INT", /* GPIO_50 */ |
| "USB1_ID", |
| "FP_SPI_MISO", |
| "FP_SPI_MOSI", |
| "FP_SPI_CLK", |
| "FP_SPI_CS_N", |
| "NFC_ESE_SPI_MISO", |
| "NFC_ESE_SPI_MOSI", |
| "NFC_ESE_SPI_CLK", |
| "NFC_ESE_SPI_CS", |
| "NFC_I2C_SDA", /* GPIO_60 */ |
| "NFC_I2C_SCLC", |
| "NFC_EN", |
| "NFC_CLK_REQ", |
| "HST_WLAN_EN", |
| "HST_BT_EN", |
| "HST_SW_CTRL", |
| "NC", |
| "HST_BT_UART_CTS", |
| "HST_BT_UART_RFR", |
| "HST_BT_UART_TX", /* GPIO_70 */ |
| "HST_BT_UART_RX", |
| "CAM_DC_SPI0_MISO", |
| "CAM_DC_SPI0_MOSI", |
| "CAM_DC_SPI0_CLK", |
| "CAM_DC_SPI0_CS_N", |
| "CAM_DC_SPI1_MISO", |
| "CAM_DC_SPI1_MOSI", |
| "CAM_DC_SPI1_CLK", |
| "CAM_DC_SPI1_CS_N", |
| "HALL_INT_N", /* GPIO_80 */ |
| "USB_PHY_PS", |
| "MDP_VSYNC_P", |
| "MDP_VSYNC_S", |
| "ETH_3P3_EN", |
| "RADAR_INT", |
| "NFC_DWL_REQ", |
| "SM_GPIO_87", |
| "WCD_RESET_N", |
| "ALSP_INT_N", |
| "PRESS_INT", /* GPIO_90 */ |
| "SAR_INT_N", |
| "SD_CARD_DET_N", |
| "NC", |
| "PCIE0_RESET_N", |
| "PCIE0_CLK_REQ_N", |
| "PCIE0_WAKE_N", |
| "PCIE1_RESET_N", |
| "PCIE1_CLK_REQ_N", |
| "PCIE1_WAKE_N", |
| "CAM_MCLK0", /* GPIO_100 */ |
| "CAM_MCLK1", |
| "CAM_MCLK2", |
| "CAM_MCLK3", |
| "CAM_MCLK4", |
| "CAM_MCLK5", |
| "CAM2_RESET_N", |
| "CCI_I2C0_SDA", |
| "CCI_I2C0_SCL", |
| "CCI_I2C1_SDA", |
| "CCI_I2C1_SCL", /* GPIO_110 */ |
| "CCI_I2C2_SDA", |
| "CCI_I2C2_SCL", |
| "CCI_I2C3_SDA", |
| "CCI_I2C3_SCL", |
| "CAM5_RESET_N", |
| "CAM4_RESET_N", |
| "CAM3_RESET_N", |
| "IMU1_INT", |
| "MAG_INT_N", |
| "MI2S2_I2S_SCK", /* GPIO_120 */ |
| "MI2S2_I2S_DAT0", |
| "MI2S2_I2S_WS", |
| "HIFI_DAC_I2S_MCLK", |
| "MI2S2_I2S_DAT1", |
| "HIFI_DAC_I2S_SCK", |
| "HIFI_DAC_I2S_DAT0", |
| "NC", |
| "HIFI_DAC_I2S_WS", |
| "HST_BT_WLAN_SLIMBUS_CLK", |
| "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ |
| "BT_LED_EN", |
| "WLAN_LED_EN", |
| "NC", |
| "NC", |
| "NC", |
| "UIM2_PRESENT", |
| "NC", |
| "NC", |
| "NC", |
| "UIM1_PRESENT", /* GPIO_140 */ |
| "NC", |
| "SM_RFFE0_DATA", |
| "NC", |
| "SM_RFFE1_DATA", |
| "SM_MSS_GRFC4", |
| "SM_MSS_GRFC5", |
| "SM_MSS_GRFC6", |
| "SM_MSS_GRFC7", |
| "SM_RFFE4_CLK", |
| "SM_RFFE4_DATA", /* GPIO_150 */ |
| "WLAN_COEX_UART1_RX", |
| "WLAN_COEX_UART1_TX", |
| "HST_SW_CTRL", |
| "DSI0_STATUS", |
| "DSI1_STATUS", |
| "APPS_PBL_BOOT_SPEED_1", |
| "APPS_BOOT_FROM_ROM", |
| "APPS_PBL_BOOT_SPEED_0", |
| "QLINK0_REQ", |
| "QLINK0_EN", /* GPIO_160 */ |
| "QLINK0_WMSS_RESET_N", |
| "NC", |
| "NC", |
| "NC", |
| "NC", |
| "NC", |
| "NC", |
| "WCD_SWR_TX_CLK", |
| "WCD_SWR_TX_DATA0", |
| "WCD_SWR_TX_DATA1", /* GPIO_170 */ |
| "WCD_SWR_RX_CLK", |
| "WCD_SWR_RX_DATA0", |
| "WCD_SWR_RX_DATA1", |
| "DMIC01_CLK", |
| "DMIC01_DATA", |
| "DMIC23_CLK", |
| "DMIC23_DATA", |
| "WSA_SWR_CLK", |
| "WSA_SWR_DATA", |
| "DMIC45_CLK", /* GPIO_180 */ |
| "DMIC45_DATA", |
| "WCD_SWR_TX_DATA2", |
| "SENSOR_I3C_SDA", |
| "SENSOR_I3C_SCL", |
| "CAM_OIS0_I3C_SDA", |
| "CAM_OIS0_I3C_SCL", |
| "IMU_SPI_MISO", |
| "IMU_SPI_MOSI", |
| "IMU_SPI_CLK", |
| "IMU_SPI_CS_N", /* GPIO_190 */ |
| "MAG_I2C_SDA", |
| "MAG_I2C_SCL", |
| "SENSOR_I2C_SDA", |
| "SENSOR_I2C_SCL", |
| "RADAR_SPI_MISO", |
| "RADAR_SPI_MOSI", |
| "RADAR_SPI_CLK", |
| "RADAR_SPI_CS_N", |
| "HST_BLE_UART_TX", |
| "HST_BLE_UART_RX", /* GPIO_200 */ |
| "HST_WLAN_UART_TX", |
| "HST_WLAN_UART_RX"; |
| |
| pcie0_default_state: pcie0-default-state { |
| perst-pins { |
| pins = "gpio94"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio95"; |
| function = "pcie0_clkreqn"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| wake-pins { |
| pins = "gpio96"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie1_default_state: pcie1-default-state { |
| perst-pins { |
| pins = "gpio97"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio98"; |
| function = "pcie1_clkreqn"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| wake-pins { |
| pins = "gpio99"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| sdc2_card_det_n: sd-card-det-n-state { |
| pins = "gpio92"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| &uart2 { |
| status = "okay"; |
| }; |
| |
| &ufs_mem_hc { |
| status = "okay"; |
| |
| reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; |
| |
| vcc-supply = <&vreg_l7b_2p96>; |
| vcc-max-microamp = <800000>; |
| vccq-supply = <&vreg_l9b_1p2>; |
| vccq-max-microamp = <900000>; |
| vdd-hba-supply = <&vreg_l9b_1p2>; |
| }; |
| |
| &ufs_mem_phy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l5b_0p88>; |
| vdda-pll-supply = <&vreg_l6b_1p2>; |
| }; |
| |
| &usb_1 { |
| status = "okay"; |
| }; |
| |
| &usb_1_dwc3 { |
| dr_mode = "otg"; |
| usb-role-switch; |
| }; |
| |
| &usb_1_dwc3_hs { |
| remote-endpoint = <&pmic_glink_hs_in>; |
| }; |
| |
| &usb_1_hsphy { |
| status = "okay"; |
| |
| vdda-pll-supply = <&vreg_l5b_0p88>; |
| vdda18-supply = <&vreg_l1c_1p8>; |
| vdda33-supply = <&vreg_l2b_3p07>; |
| }; |
| |
| &usb_1_qmpphy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l6b_1p2>; |
| vdda-pll-supply = <&vreg_l1b_0p88>; |
| }; |
| |
| &usb_1_qmpphy_out { |
| remote-endpoint = <&pmic_glink_ss_in>; |
| }; |
| |
| &usb_2 { |
| status = "okay"; |
| }; |
| |
| &usb_2_dwc3 { |
| dr_mode = "host"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb_hub_enabled_state>; |
| }; |
| |
| &usb_2_hsphy { |
| status = "okay"; |
| |
| vdda-pll-supply = <&vreg_l5b_0p88>; |
| vdda18-supply = <&vreg_l1c_1p8>; |
| vdda33-supply = <&vreg_l2b_3p07>; |
| }; |
| |
| &usb_2_qmpphy { |
| status = "okay"; |
| |
| vdda-phy-supply = <&vreg_l6b_1p2>; |
| vdda-pll-supply = <&vreg_l5b_0p88>; |
| }; |
| |
| /* PINCTRL - additions to nodes defined in sm8350.dtsi */ |
| |
| &tlmm { |
| usb_hub_enabled_state: usb-hub-enabled-state { |
| pins = "gpio42"; |
| function = "gpio"; |
| |
| drive-strength = <2>; |
| output-low; |
| }; |
| |
| lt9611_state: lt9611-state { |
| rst-pins { |
| pins = "gpio48"; |
| function = "gpio"; |
| |
| output-high; |
| input-disable; |
| }; |
| |
| irq-pins { |
| pins = "gpio50"; |
| function = "gpio"; |
| bias-disable; |
| }; |
| }; |
| }; |
