| // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) |
| /* |
| * Device tree for the WolfVision PF5 mainboard. |
| * |
| * Copyright (C) 2024 WolfVision GmbH. |
| */ |
| |
| /dts-v1/; |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/pinctrl/rockchip.h> |
| #include <dt-bindings/regulator/ti,tps62864.h> |
| #include <dt-bindings/soc/rockchip,vop2.h> |
| #include "rk3568.dtsi" |
| |
| / { |
| model = "WolfVision PF5"; |
| compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568"; |
| |
| aliases { |
| ethernet0 = &gmac0; |
| mmc0 = &sdhci; |
| rtc0 = &pcf85623; |
| rtc1 = &rk809; |
| }; |
| |
| chosen: chosen { |
| stdout-path = "serial2:115200n8"; |
| }; |
| |
| hdmi_tx: hdmi-tx-connector { |
| compatible = "hdmi-connector"; |
| hdmi-pwr-supply = <&hdmi_tx_5v>; |
| type = "a"; |
| |
| port { |
| hdmi_tx_in: endpoint { |
| remote-endpoint = <&hdmi_tx_out>; |
| }; |
| }; |
| }; |
| |
| hdmi_tx_5v: hdmi-tx-5v-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&hdmi_tx_5v_en>; |
| regulator-name = "hdmi_tx_5v"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| vin-supply = <&vcc5v_in>; |
| }; |
| |
| pdm_codec: pdm-codec { |
| compatible = "dmic-codec"; |
| num-channels = <1>; |
| #sound-dai-cells = <0>; |
| }; |
| |
| pdm_sound: pdm-sound { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "microphone"; |
| |
| simple-audio-card,cpu { |
| sound-dai = <&pdm>; |
| }; |
| |
| simple-audio-card,codec { |
| sound-dai = <&pdm_codec>; |
| }; |
| }; |
| |
| vcc12v_cam: vcc12v-cam-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc12v_cam_en>; |
| regulator-name = "12v_cam"; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| vin-supply = <&vcc12v_in>; |
| }; |
| |
| vcc12v_in: vcc12v-in-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "12v_in"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| }; |
| |
| vcc3v8_cam: vcc3v8-cam-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc3v8_cam_en>; |
| regulator-name = "3v8_cam"; |
| regulator-min-microvolt = <3800000>; |
| regulator-max-microvolt = <3800000>; |
| vin-supply = <&vcc5v_in>; |
| }; |
| |
| vcc3v3_sys: vcc3v3-sys-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "3v3_sys"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&vcc5v_in>; |
| }; |
| |
| vcc5v_in: vcc5v-in-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "5v_in"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| vin-supply = <&vcc12v_in>; |
| }; |
| }; |
| |
| &combphy0 { |
| status = "okay"; |
| }; |
| |
| &cpu0 { |
| cpu-supply = <&vcc0v9_cpu>; |
| }; |
| |
| &cpu1 { |
| cpu-supply = <&vcc0v9_cpu>; |
| }; |
| |
| &cpu2 { |
| cpu-supply = <&vcc0v9_cpu>; |
| }; |
| |
| &cpu3 { |
| cpu-supply = <&vcc0v9_cpu>; |
| }; |
| |
| &gpu { |
| mali-supply = <&vcc0v9_gpu>; |
| status = "okay"; |
| }; |
| |
| &hdmi { |
| avdd-0v9-supply = <&vcc0v9a_image>; |
| avdd-1v8-supply = <&vcc1v8a_image>; |
| status = "okay"; |
| }; |
| |
| &hdmi_in { |
| hdmi_in_vp0: endpoint { |
| remote-endpoint = <&vp0_out_hdmi>; |
| }; |
| }; |
| |
| &hdmi_out { |
| hdmi_tx_out: endpoint { |
| remote-endpoint = <&hdmi_tx_in>; |
| }; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| |
| rk809: pmic@20 { |
| compatible = "rockchip,rk809"; |
| reg = <0x20>; |
| interrupt-parent = <&gpio0>; |
| interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; |
| #clock-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pmic_int_l>; |
| rockchip,system-power-controller; |
| vcc1-supply = <&vcc5v_in>; |
| vcc2-supply = <&vcc5v_in>; |
| vcc3-supply = <&vcc5v_in>; |
| vcc4-supply = <&vcc5v_in>; |
| vcc5-supply = <&vcc3v3_sys>; |
| vcc6-supply = <&vcc5v_in>; |
| vcc7-supply = <&vcc3v3_sys>; |
| vcc8-supply = <&vcc3v3_sys>; |
| vcc9-supply = <&vcc3v3_sys>; |
| wakeup-source; |
| |
| regulators { |
| vcc0v9_logic: DCDC_REG1 { |
| regulator-name = "0v9_logic"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-initial-mode = <0x2>; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-ramp-delay = <6001>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc0v9_gpu: DCDC_REG2 { |
| regulator-name = "0v9_gpu"; |
| regulator-always-on; |
| regulator-initial-mode = <0x2>; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-ramp-delay = <6001>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc1v1_ddr4: DCDC_REG3 { |
| regulator-name = "1v1_ddr4"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-initial-mode = <0x2>; |
| |
| regulator-state-mem { |
| regulator-on-in-suspend; |
| }; |
| }; |
| |
| vcc0v9_npu: DCDC_REG4 { |
| regulator-name = "0v9_npu"; |
| regulator-always-on; |
| regulator-initial-mode = <0x2>; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-ramp-delay = <6001>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc1v8: DCDC_REG5 { |
| regulator-name = "1v8"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc0v9a_image: LDO_REG1 { |
| regulator-name = "0v9a_image"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <900000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc0v9a: LDO_REG2 { |
| regulator-name = "0v9a"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <900000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc0v9a_pmu: LDO_REG3 { |
| regulator-name = "0v9a_pmu"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <900000>; |
| |
| regulator-state-mem { |
| regulator-on-in-suspend; |
| regulator-suspend-microvolt = <900000>; |
| }; |
| }; |
| |
| vcc3v3_acodec: LDO_REG4 { |
| regulator-name = "3v3_acodec"; |
| regulator-always-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc3v3_sd: LDO_REG5 { |
| regulator-name = "3v3_sd"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc3v3_pmu: LDO_REG6 { |
| regulator-name = "3v3_pmu"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| regulator-state-mem { |
| regulator-on-in-suspend; |
| regulator-suspend-microvolt = <3300000>; |
| }; |
| }; |
| |
| vcc1v8a: LDO_REG7 { |
| regulator-name = "1v8a"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc1v8a_pmu: LDO_REG8 { |
| regulator-name = "1v8a_pmu"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| regulator-state-mem { |
| regulator-on-in-suspend; |
| regulator-suspend-microvolt = <1800000>; |
| }; |
| }; |
| |
| vcc1v8a_image: LDO_REG9 { |
| regulator-name = "1v8a_image"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| vcc3v3_sw: SWITCH_REG1 { |
| regulator-name = "3v3_sw"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| }; |
| }; |
| |
| regulator@42 { |
| compatible = "ti,tps62869"; |
| reg = <0x42>; |
| |
| regulators { |
| vcc0v9_cpu: SW { |
| regulator-name = "0v9_cpu"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-initial-mode = <TPS62864_MODE_FPWM>; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1150000>; |
| vin-supply = <&vcc5v_in>; |
| |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| }; |
| }; |
| |
| pcf85623: rtc@51 { |
| compatible = "nxp,pcf85263"; |
| reg = <0x51>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&clk32k_in>; |
| quartz-load-femtofarads = <12500>; |
| }; |
| }; |
| |
| &i2c3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c3m0_xfer>; |
| }; |
| |
| &i2c4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c4m1_xfer>; |
| }; |
| |
| &pdm { |
| pinctrl-0 = <&pdmm0_clk |
| &pdmm0_sdi0>; |
| status = "okay"; |
| }; |
| |
| &pinctrl { |
| cam { |
| vcc12v_cam_en: vcc12v-cam-en-pinctrl { |
| rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| |
| vcc3v8_cam_en: vcc3v8-cam-en-pinctrl { |
| rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| hdmitx { |
| hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl { |
| rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| pmic { |
| pmic_int_l: pmic-int-l-pinctrl { |
| rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; |
| }; |
| }; |
| }; |
| |
| &pmu_io_domains { |
| pmuio1-supply = <&vcc3v3_pmu>; |
| pmuio2-supply = <&vcc3v3_pmu>; |
| vccio1-supply = <&vcc3v3_acodec>; |
| vccio2-supply = <&vcc1v8>; |
| vccio3-supply = <&vcc3v3_sd>; |
| vccio4-supply = <&vcc1v8>; |
| vccio5-supply = <&vcc1v8>; |
| vccio6-supply = <&vcc3v3_sw>; |
| vccio7-supply = <&vcc3v3_sw>; |
| status = "okay"; |
| }; |
| |
| &saradc { |
| vref-supply = <&vcc1v8a>; |
| status = "okay"; |
| }; |
| |
| &sdhci { |
| bus-width = <8>; |
| max-frequency = <200000000>; |
| non-removable; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; |
| vmmc-supply = <&vcc3v3_sw>; |
| vqmmc-supply = <&vcc1v8>; |
| status = "okay"; |
| }; |
| |
| &tsadc { |
| rockchip,hw-tshut-mode = <1>; |
| rockchip,hw-tshut-polarity = <0>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| status = "okay"; |
| }; |
| |
| &usb_host0_xhci { |
| dr_mode = "peripheral"; |
| /* The following quirks are required since the bInterval is 1 and we |
| * handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3 |
| * ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries"). |
| */ |
| snps,dis-u1-entry-quirk; |
| snps,dis-u2-entry-quirk; |
| /* |
| * Without this quirk the available fifosize seems to be miscalculated |
| * in cases where many endpoints are used. In one particular situation |
| * 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers |
| * without the resize quirk. |
| */ |
| tx-fifo-resize; |
| |
| status = "okay"; |
| }; |
| |
| &usb2phy0 { |
| status = "okay"; |
| }; |
| |
| &usb2phy0_otg { |
| status = "okay"; |
| }; |
| |
| &vop { |
| assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP2>; |
| assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; |
| status = "okay"; |
| }; |
| |
| &vop_mmu { |
| status = "okay"; |
| }; |
| |
| &vp0 { |
| vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { |
| reg = <ROCKCHIP_VOP2_EP_HDMI0>; |
| remote-endpoint = <&hdmi_in_vp0>; |
| }; |
| }; |
