| * NXP Flex Serial Peripheral Interface (FSPI) |
| |
| Required properties: |
| - compatible : Should be "nxp,lx2160a-fspi" |
| "nxp,imx8qxp-fspi" |
| "nxp,imx8mm-fspi" |
| "nxp,imx8mp-fspi" |
| "nxp,imx8dxl-fspi" |
| |
| - reg : First contains the register location and length, |
| Second contains the memory mapping address and length |
| - reg-names : Should contain the resource reg names: |
| - fspi_base: configuration register address space |
| - fspi_mmap: memory mapped address space |
| - interrupts : Should contain the interrupt for the device |
| |
| Required SPI slave node properties: |
| - reg : There are two buses (A and B) with two chip selects each. |
| This encodes to which bus and CS the flash is connected: |
| - <0>: Bus A, CS 0 |
| - <1>: Bus A, CS 1 |
| - <2>: Bus B, CS 0 |
| - <3>: Bus B, CS 1 |
| |
| Example showing the usage of two SPI NOR slave devices on bus A: |
| |
| fspi0: spi@20c0000 { |
| compatible = "nxp,lx2160a-fspi"; |
| reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>; |
| reg-names = "fspi_base", "fspi_mmap"; |
| interrupts = <0 25 0x4>; /* Level high type */ |
| clocks = <&clockgen 4 3>, <&clockgen 4 3>; |
| clock-names = "fspi_en", "fspi"; |
| |
| mt35xu512aba0: flash@0 { |
| reg = <0>; |
| .... |
| }; |
| |
| mt35xu512aba1: flash@1 { |
| reg = <1>; |
| .... |
| }; |
| }; |