| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Samsung Exynos5433 TM2 board device tree source |
| * |
| * Copyright (c) 2016 Samsung Electronics Co., Ltd. |
| * |
| * Common device tree source file for Samsung's TM2 and TM2E boards |
| * which are based on Samsung Exynos5433 SoC. |
| */ |
| |
| /dts-v1/; |
| #include "exynos5433.dtsi" |
| #include <dt-bindings/clock/samsung,s2mps11.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/sound/samsung-i2s.h> |
| |
| / { |
| aliases { |
| gsc0 = &gsc_0; |
| gsc1 = &gsc_1; |
| gsc2 = &gsc_2; |
| pinctrl0 = &pinctrl_alive; |
| pinctrl1 = &pinctrl_aud; |
| pinctrl2 = &pinctrl_cpif; |
| pinctrl3 = &pinctrl_ese; |
| pinctrl4 = &pinctrl_finger; |
| pinctrl5 = &pinctrl_fsys; |
| pinctrl6 = &pinctrl_imem; |
| pinctrl7 = &pinctrl_nfc; |
| pinctrl8 = &pinctrl_peric; |
| pinctrl9 = &pinctrl_touch; |
| serial0 = &serial_0; |
| serial1 = &serial_1; |
| serial2 = &serial_2; |
| serial3 = &serial_3; |
| spi0 = &spi_0; |
| spi1 = &spi_1; |
| spi2 = &spi_2; |
| spi3 = &spi_3; |
| spi4 = &spi_4; |
| mshc0 = &mshc_0; |
| mshc2 = &mshc_2; |
| }; |
| |
| chosen { |
| stdout-path = &serial_1; |
| }; |
| |
| memory@20000000 { |
| device_type = "memory"; |
| reg = <0x0 0x20000000 0x0 0xc0000000>; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| power-key { |
| gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_POWER>; |
| label = "power key"; |
| debounce-interval = <10>; |
| }; |
| |
| volume-up-key { |
| gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_VOLUMEUP>; |
| label = "volume-up key"; |
| debounce-interval = <10>; |
| }; |
| |
| volume-down-key { |
| gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_VOLUMEDOWN>; |
| label = "volume-down key"; |
| debounce-interval = <10>; |
| }; |
| |
| homepage-key { |
| gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_MENU>; |
| label = "homepage key"; |
| debounce-interval = <10>; |
| }; |
| }; |
| |
| i2c_max98504: i2c-gpio-0 { |
| compatible = "i2c-gpio"; |
| sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>; |
| scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>; |
| i2c-gpio,delay-us = <2>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| max98504: amplifier@31 { |
| compatible = "maxim,max98504"; |
| reg = <0x31>; |
| maxim,rx-path = <1>; |
| maxim,tx-path = <1>; |
| maxim,tx-channel-mask = <3>; |
| maxim,tx-channel-source = <2>; |
| }; |
| }; |
| |
| irda_regulator: irda-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; |
| regulator-name = "irda_regulator"; |
| }; |
| |
| sound { |
| compatible = "samsung,tm2-audio"; |
| audio-codec = <&wm5110>, <&hdmi>; |
| i2s-controller = <&i2s0 0>, <&i2s1 0>; |
| audio-amplifier = <&max98504>; |
| mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; |
| model = "wm5110"; |
| samsung,audio-routing = |
| /* Headphone */ |
| "HP", "HPOUT1L", |
| "HP", "HPOUT1R", |
| |
| /* Speaker */ |
| "SPK", "SPKOUT", |
| "SPKOUT", "HPOUT2L", |
| "SPKOUT", "HPOUT2R", |
| |
| /* Receiver */ |
| "RCV", "HPOUT3L", |
| "RCV", "HPOUT3R"; |
| status = "okay"; |
| }; |
| }; |
| |
| &adc { |
| vdd-supply = <&ldo3_reg>; |
| status = "okay"; |
| |
| thermistor-ap { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <100000>; |
| pulldown-ohm = <0>; |
| io-channels = <&adc 0>; |
| }; |
| |
| thermistor-battery { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <100000>; |
| pulldown-ohm = <0>; |
| io-channels = <&adc 1>; |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| thermistor-charger { |
| compatible = "murata,ncp03wf104"; |
| pullup-uv = <1800000>; |
| pullup-ohm = <100000>; |
| pulldown-ohm = <0>; |
| io-channels = <&adc 2>; |
| }; |
| }; |
| |
| &bus_g2d_400 { |
| devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; |
| vdd-supply = <&buck4_reg>; |
| exynos,saturation-ratio = <10>; |
| status = "okay"; |
| }; |
| |
| &bus_g2d_266 { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_gscl { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_hevc { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_jpeg { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_mfc { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_mscl { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_noc0 { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_noc1 { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &bus_noc2 { |
| devfreq = <&bus_g2d_400>; |
| status = "okay"; |
| }; |
| |
| &cmu_aud { |
| assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>, |
| <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>, |
| <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>, |
| <&cmu_top CLK_MOUT_AUD_PLL>, |
| <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, |
| <&cmu_top CLK_MOUT_SCLK_AUDIO0>, |
| <&cmu_top CLK_MOUT_SCLK_AUDIO1>, |
| <&cmu_top CLK_MOUT_SCLK_SPDIF>, |
| |
| <&cmu_aud CLK_DIV_AUD_CA5>, |
| <&cmu_aud CLK_DIV_ACLK_AUD>, |
| <&cmu_aud CLK_DIV_PCLK_DBG_AUD>, |
| <&cmu_aud CLK_DIV_SCLK_AUD_I2S>, |
| <&cmu_aud CLK_DIV_SCLK_AUD_PCM>, |
| <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>, |
| <&cmu_aud CLK_DIV_SCLK_AUD_UART>, |
| <&cmu_top CLK_DIV_SCLK_AUDIO0>, |
| <&cmu_top CLK_DIV_SCLK_AUDIO1>, |
| <&cmu_top CLK_DIV_SCLK_PCM1>, |
| <&cmu_top CLK_DIV_SCLK_I2S1>; |
| |
| assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>, |
| <&cmu_aud CLK_MOUT_AUD_PLL_USER>, |
| <&cmu_aud CLK_MOUT_AUD_PLL_USER>, |
| <&cmu_top CLK_FOUT_AUD_PLL>, |
| <&cmu_top CLK_MOUT_AUD_PLL>, |
| <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, |
| <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, |
| <&cmu_top CLK_SCLK_AUDIO0>; |
| |
| assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, |
| <196608001>, <65536001>, <32768001>, <49152001>, |
| <2048001>, <24576001>, <196608001>, |
| <24576001>, <98304001>, <2048001>, <49152001>; |
| }; |
| |
| &cmu_fsys { |
| assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, |
| <&cmu_top CLK_MOUT_SCLK_USBHOST30>, |
| <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, |
| <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, |
| <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, |
| <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, |
| <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, |
| <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, |
| <&cmu_top CLK_DIV_SCLK_USBDRD30>, |
| <&cmu_top CLK_DIV_SCLK_USBHOST30>; |
| assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, |
| <&cmu_top CLK_MOUT_BUS_PLL_USER>, |
| <&cmu_top CLK_SCLK_USBDRD30_FSYS>, |
| <&cmu_top CLK_SCLK_USBHOST30_FSYS>, |
| <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, |
| <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, |
| <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, |
| <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; |
| assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, |
| <66700000>, <66700000>; |
| }; |
| |
| &cmu_gscl { |
| assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, |
| <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; |
| assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, |
| <&cmu_top CLK_ACLK_GSCL_333>; |
| }; |
| |
| &cmu_mfc { |
| assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; |
| assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; |
| }; |
| |
| &cmu_mif { |
| assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>; |
| assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>; |
| assigned-clock-rates = <0>, <333000000>; |
| }; |
| |
| &cmu_mscl { |
| assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, |
| <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, |
| <&cmu_mscl CLK_MOUT_SCLK_JPEG>, |
| <&cmu_top CLK_MOUT_SCLK_JPEG_A>; |
| assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, |
| <&cmu_top CLK_SCLK_JPEG_MSCL>, |
| <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, |
| <&cmu_top CLK_MOUT_BUS_PLL_USER>; |
| }; |
| |
| &cmu_top { |
| assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>; |
| assigned-clock-rates = <196608001>; |
| }; |
| |
| &cpu0 { |
| cpu-supply = <&buck3_reg>; |
| }; |
| |
| &cpu4 { |
| cpu-supply = <&buck2_reg>; |
| }; |
| |
| &decon { |
| status = "okay"; |
| }; |
| |
| &decon_tv { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| tv_to_hdmi: endpoint { |
| remote-endpoint = <&hdmi_to_tv>; |
| }; |
| }; |
| }; |
| }; |
| |
| &dsi { |
| status = "okay"; |
| vddcore-supply = <&ldo6_reg>; |
| vddio-supply = <&ldo7_reg>; |
| samsung,burst-clock-frequency = <512000000>; |
| samsung,esc-clock-frequency = <16000000>; |
| samsung,pll-clock-frequency = <24000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&te_irq>; |
| }; |
| |
| &gpu { |
| mali-supply = <&buck6_reg>; |
| status = "okay"; |
| }; |
| |
| &hdmi { |
| hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| vdd-supply = <&ldo6_reg>; |
| vdd_osc-supply = <&ldo7_reg>; |
| vdd_pll-supply = <&ldo6_reg>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| hdmi_to_tv: endpoint { |
| remote-endpoint = <&tv_to_hdmi>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| hdmi_to_mhl: endpoint { |
| remote-endpoint = <&mhl_to_hdmi>; |
| }; |
| }; |
| }; |
| }; |
| |
| &hsi2c_0 { |
| status = "okay"; |
| clock-frequency = <2500000>; |
| |
| pmic@66 { |
| compatible = "samsung,s2mps13-pmic"; |
| interrupt-parent = <&gpa0>; |
| interrupts = <7 IRQ_TYPE_NONE>; |
| reg = <0x66>; |
| samsung,s2mps11-wrstbi-ground; |
| |
| s2mps13_osc: clocks { |
| compatible = "samsung,s2mps13-clk"; |
| #clock-cells = <1>; |
| clock-output-names = "s2mps13_ap", "s2mps13_cp", |
| "s2mps13_bt"; |
| }; |
| |
| regulators { |
| ldo1_reg: LDO1 { |
| regulator-name = "VDD_ALIVE_0.9V_AP"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <900000>; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: LDO2 { |
| regulator-name = "VDDQ_MMC2_2.8V_AP"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo3_reg: LDO3 { |
| regulator-name = "VDD1_E_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: LDO4 { |
| regulator-name = "VDD10_MIF_PLL_1.0V_AP"; |
| regulator-min-microvolt = <1300000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo5_reg: LDO5 { |
| regulator-name = "VDD10_DPLL_1.0V_AP"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo6_reg: LDO6 { |
| regulator-name = "VDD10_MIPI2L_1.0V_AP"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo7_reg: LDO7 { |
| regulator-name = "VDD18_MIPI2L_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo8_reg: LDO8 { |
| regulator-name = "VDD18_LLI_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo9_reg: LDO9 { |
| regulator-name = "VDD18_ABB_ETC_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo10_reg: LDO10 { |
| regulator-name = "VDD33_USB30_3.0V_AP"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo11_reg: LDO11 { |
| regulator-name = "VDD_INT_M_1.0V_AP"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo12_reg: LDO12 { |
| regulator-name = "VDD_KFC_M_1.1V_AP"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-always-on; |
| }; |
| |
| ldo13_reg: LDO13 { |
| regulator-name = "VDD_G3D_M_0.95V_AP"; |
| regulator-min-microvolt = <950000>; |
| regulator-max-microvolt = <950000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo14_reg: LDO14 { |
| regulator-name = "VDDQ_M1_LDO_1.2V_AP"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo15_reg: LDO15 { |
| regulator-name = "VDDQ_M2_LDO_1.2V_AP"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| ldo16_reg: LDO16 { |
| regulator-name = "VDDQ_EFUSE"; |
| regulator-min-microvolt = <1400000>; |
| regulator-max-microvolt = <3400000>; |
| regulator-always-on; |
| }; |
| |
| ldo17_reg: LDO17 { |
| regulator-name = "V_TFLASH_2.8V_AP"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| ldo18_reg: LDO18 { |
| regulator-name = "V_CODEC_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo19_reg: LDO19 { |
| regulator-name = "VDDA_1.8V_COMP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo20_reg: LDO20 { |
| regulator-name = "VCC_2.8V_AP"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-always-on; |
| }; |
| |
| ldo21_reg: LDO21 { |
| regulator-name = "VT_CAM_1.8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo22_reg: LDO22 { |
| regulator-name = "CAM_IO_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo23_reg: LDO23 { |
| regulator-name = "CAM_SEN_CORE_1.05V_AP"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| }; |
| |
| ldo24_reg: LDO24 { |
| regulator-name = "VT_CAM_1.2V"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| ldo25_reg: LDO25 { |
| regulator-name = "UNUSED_LDO25"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| ldo26_reg: LDO26 { |
| regulator-name = "CAM_AF_2.8V_AP"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| ldo27_reg: LDO27 { |
| regulator-name = "VCC_3.0V_LCD_AP"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| }; |
| |
| ldo28_reg: LDO28 { |
| regulator-name = "VCC_1.8V_LCD_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo29_reg: LDO29 { |
| regulator-name = "VT_CAM_2.8V"; |
| regulator-min-microvolt = <3000000>; |
| regulator-max-microvolt = <3000000>; |
| }; |
| |
| ldo30_reg: LDO30 { |
| regulator-name = "TSP_AVDD_3.3V_AP"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| ldo31_reg: LDO31 { |
| /* |
| * LDO31 differs from target to target, |
| * its definition is in the .dts |
| */ |
| }; |
| |
| ldo32_reg: LDO32 { |
| regulator-name = "VTOUCH_1.8V_AP"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo33_reg: LDO33 { |
| regulator-name = "VTOUCH_LED_3.3V"; |
| regulator-min-microvolt = <2500000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-ramp-delay = <12500>; |
| }; |
| |
| ldo34_reg: LDO34 { |
| regulator-name = "VCC_1.8V_MHL_AP"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <2100000>; |
| }; |
| |
| ldo35_reg: LDO35 { |
| regulator-name = "OIS_VM_2.8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| ldo36_reg: LDO36 { |
| regulator-name = "VSIL_1.0V"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1000000>; |
| }; |
| |
| ldo37_reg: LDO37 { |
| regulator-name = "VF_1.8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo38_reg: LDO38 { |
| /* |
| * LDO38 differs from target to target, |
| * its definition is in the .dts |
| */ |
| }; |
| |
| ldo39_reg: LDO39 { |
| regulator-name = "V_HRM_1.8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo40_reg: LDO40 { |
| regulator-name = "V_HRM_3.3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| buck1_reg: BUCK1 { |
| regulator-name = "VDD_MIF_0.9V_AP"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck2_reg: BUCK2 { |
| regulator-name = "VDD_EGL_1.0V_AP"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck3_reg: BUCK3 { |
| regulator-name = "VDD_KFC_1.0V_AP"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck4_reg: BUCK4 { |
| regulator-name = "VDD_INT_0.95V_AP"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck5_reg: BUCK5 { |
| regulator-name = "VDD_DISP_CAM0_0.9V_AP"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck6_reg: BUCK6 { |
| regulator-name = "VDD_G3D_0.9V_AP"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-state-mem { |
| regulator-off-in-suspend; |
| }; |
| }; |
| |
| buck7_reg: BUCK7 { |
| regulator-name = "VDD_MEM1_1.2V_AP"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| }; |
| |
| buck8_reg: BUCK8 { |
| regulator-name = "VDD_LLDO_1.35V_AP"; |
| regulator-min-microvolt = <1350000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| buck9_reg: BUCK9 { |
| regulator-name = "VDD_MLDO_2.0V_AP"; |
| regulator-min-microvolt = <1350000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| buck10_reg: BUCK10 { |
| regulator-name = "vdd_mem2"; |
| regulator-min-microvolt = <550000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| }; |
| |
| &hsi2c_4 { |
| status = "okay"; |
| |
| s3fwrn5: nfc@27 { |
| compatible = "samsung,s3fwrn5-i2c"; |
| reg = <0x27>; |
| interrupt-parent = <&gpa1>; |
| interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; |
| en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; |
| wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| &hsi2c_5 { |
| status = "okay"; |
| |
| stmfts: touchscreen@49 { |
| compatible = "st,stmfts"; |
| reg = <0x49>; |
| interrupt-parent = <&gpa1>; |
| interrupts = <1 IRQ_TYPE_LEVEL_LOW>; |
| avdd-supply = <&ldo30_reg>; |
| vdd-supply = <&ldo31_reg>; |
| }; |
| }; |
| |
| &hsi2c_7 { |
| status = "okay"; |
| clock-frequency = <1000000>; |
| |
| bridge@39 { |
| reg = <0x39>; |
| compatible = "sil,sii8620"; |
| cvcc10-supply = <&ldo36_reg>; |
| iovcc18-supply = <&ldo34_reg>; |
| interrupt-parent = <&gpf0>; |
| interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; |
| reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; |
| clocks = <&pmu_system_controller 0>; |
| clock-names = "xtal"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| mhl_to_hdmi: endpoint { |
| remote-endpoint = <&hdmi_to_mhl>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| mhl_to_musb_con: endpoint { |
| remote-endpoint = <&musb_con_to_mhl>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &hsi2c_8 { |
| status = "okay"; |
| |
| pmic@66 { |
| compatible = "maxim,max77843"; |
| interrupt-parent = <&gpa1>; |
| interrupts = <5 IRQ_TYPE_EDGE_FALLING>; |
| reg = <0x66>; |
| |
| muic: max77843-muic { |
| compatible = "maxim,max77843-muic"; |
| |
| musb_con: musb-connector { |
| compatible = "samsung,usb-connector-11pin", |
| "usb-b-connector"; |
| label = "micro-USB"; |
| type = "micro"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@3 { |
| reg = <3>; |
| musb_con_to_mhl: endpoint { |
| remote-endpoint = <&mhl_to_musb_con>; |
| }; |
| }; |
| }; |
| }; |
| |
| ports { |
| port { |
| muic_to_usb: endpoint { |
| remote-endpoint = <&usb_to_muic>; |
| }; |
| }; |
| }; |
| }; |
| |
| regulators { |
| compatible = "maxim,max77843-regulator"; |
| safeout1_reg: SAFEOUT1 { |
| regulator-name = "SAFEOUT1"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <4950000>; |
| }; |
| |
| safeout2_reg: SAFEOUT2 { |
| regulator-name = "SAFEOUT2"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <4950000>; |
| }; |
| |
| charger_reg: CHARGER { |
| regulator-name = "CHARGER"; |
| regulator-min-microamp = <100000>; |
| regulator-max-microamp = <3150000>; |
| }; |
| }; |
| |
| haptic: max77843-haptic { |
| compatible = "maxim,max77843-haptic"; |
| haptic-supply = <&ldo38_reg>; |
| pwms = <&pwm 0 33670 0>; |
| pwm-names = "haptic"; |
| }; |
| }; |
| }; |
| |
| &hsi2c_11 { |
| status = "okay"; |
| }; |
| |
| &i2s0 { |
| status = "okay"; |
| }; |
| |
| &i2s1 { |
| assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>; |
| assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>; |
| status = "okay"; |
| }; |
| |
| &mshc_0 { |
| status = "okay"; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| cap-mmc-highspeed; |
| non-removable; |
| card-detect-delay = <200>; |
| samsung,dw-mshc-ciu-div = <3>; |
| samsung,dw-mshc-sdr-timing = <0 4>; |
| samsung,dw-mshc-ddr-timing = <0 2>; |
| samsung,dw-mshc-hs400-timing = <0 3>; |
| samsung,read-strobe-delay = <90>; |
| fifo-depth = <0x80>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 |
| &sd0_bus8 &sd0_rdqs>; |
| bus-width = <8>; |
| assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; |
| assigned-clock-rates = <800000000>; |
| }; |
| |
| &mshc_2 { |
| status = "okay"; |
| cap-sd-highspeed; |
| disable-wp; |
| cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; |
| card-detect-delay = <200>; |
| samsung,dw-mshc-ciu-div = <3>; |
| samsung,dw-mshc-sdr-timing = <0 4>; |
| samsung,dw-mshc-ddr-timing = <0 2>; |
| fifo-depth = <0x80>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; |
| bus-width = <4>; |
| }; |
| |
| &pcie { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie_bus &pcie_wlanen>; |
| vdd10-supply = <&ldo6_reg>; |
| vdd18-supply = <&ldo7_reg>; |
| assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>, |
| <&cmu_top CLK_MOUT_SCLK_PCIE_100>; |
| assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>, |
| <&cmu_top CLK_MOUT_BUS_PLL_USER>; |
| assigned-clock-rates = <0>, <100000000>; |
| interrupt-map-mask = <0 0 0 0>; |
| interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &pcie_phy { |
| status = "okay"; |
| }; |
| |
| &ppmu_d0_general { |
| status = "okay"; |
| events { |
| ppmu_event0_d0_general: ppmu-event0-d0-general { |
| event-name = "ppmu-event0-d0-general"; |
| }; |
| }; |
| }; |
| |
| &ppmu_d1_general { |
| status = "okay"; |
| events { |
| ppmu_event0_d1_general: ppmu-event0-d1-general { |
| event-name = "ppmu-event0-d1-general"; |
| }; |
| }; |
| }; |
| |
| &pinctrl_alive { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_alive>; |
| |
| initial_alive: initial-state { |
| PIN(INPUT, gpa0-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpa0-1, NONE, FAST_SR1); |
| PIN(INPUT, gpa0-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpa0-3, NONE, FAST_SR1); |
| PIN(INPUT, gpa0-4, NONE, FAST_SR1); |
| PIN(INPUT, gpa0-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpa0-6, NONE, FAST_SR1); |
| PIN(INPUT, gpa0-7, NONE, FAST_SR1); |
| |
| PIN(INPUT, gpa1-0, UP, FAST_SR1); |
| PIN(INPUT, gpa1-1, UP, FAST_SR1); |
| PIN(INPUT, gpa1-2, NONE, FAST_SR1); |
| PIN(INPUT, gpa1-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpa1-4, DOWN, FAST_SR1); |
| PIN(INPUT, gpa1-5, NONE, FAST_SR1); |
| PIN(INPUT, gpa1-6, NONE, FAST_SR1); |
| PIN(INPUT, gpa1-7, NONE, FAST_SR1); |
| |
| PIN(INPUT, gpa2-0, NONE, FAST_SR1); |
| PIN(INPUT, gpa2-1, NONE, FAST_SR1); |
| PIN(INPUT, gpa2-2, NONE, FAST_SR1); |
| PIN(INPUT, gpa2-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpa2-4, NONE, FAST_SR1); |
| PIN(INPUT, gpa2-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpa2-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpa2-7, NONE, FAST_SR1); |
| |
| PIN(INPUT, gpa3-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpa3-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpa3-2, NONE, FAST_SR1); |
| PIN(INPUT, gpa3-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpa3-4, NONE, FAST_SR1); |
| PIN(INPUT, gpa3-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpa3-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpa3-7, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpf1-0, NONE, FAST_SR1); |
| PIN(INPUT, gpf1-1, NONE, FAST_SR1); |
| PIN(INPUT, gpf1-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpf1-4, UP, FAST_SR1); |
| PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); |
| PIN(INPUT, gpf1-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpf1-7, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpf2-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpf2-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpf2-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpf2-3, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpf3-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpf3-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpf3-2, NONE, FAST_SR1); |
| PIN(INPUT, gpf3-3, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpf4-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-4, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpf4-7, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpf5-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpf5-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpf5-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpf5-3, DOWN, FAST_SR1); |
| PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); |
| PIN(INPUT, gpf5-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpf5-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpf5-7, DOWN, FAST_SR1); |
| }; |
| |
| te_irq: te-irq { |
| samsung,pins = "gpf1-3"; |
| samsung,pin-function = <0xf>; |
| }; |
| }; |
| |
| &pinctrl_cpif { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_cpif>; |
| |
| initial_cpif: initial-state { |
| PIN(INPUT, gpv6-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpv6-1, DOWN, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_ese { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_ese>; |
| |
| pcie_wlanen: pcie-wlanen { |
| PIN(INPUT, gpj2-0, UP, FAST_SR4); |
| }; |
| |
| initial_ese: initial-state { |
| PIN(INPUT, gpj2-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpj2-2, DOWN, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_fsys { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_fsys>; |
| |
| initial_fsys: initial-state { |
| PIN(INPUT, gpr3-0, NONE, FAST_SR1); |
| PIN(INPUT, gpr3-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpr3-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpr3-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpr3-7, NONE, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_imem { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_imem>; |
| |
| initial_imem: initial-state { |
| PIN(INPUT, gpf0-0, UP, FAST_SR1); |
| PIN(INPUT, gpf0-1, UP, FAST_SR1); |
| PIN(INPUT, gpf0-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpf0-3, UP, FAST_SR1); |
| PIN(INPUT, gpf0-4, DOWN, FAST_SR1); |
| PIN(INPUT, gpf0-5, NONE, FAST_SR1); |
| PIN(INPUT, gpf0-6, DOWN, FAST_SR1); |
| PIN(INPUT, gpf0-7, UP, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_nfc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_nfc>; |
| |
| initial_nfc: initial-state { |
| PIN(INPUT, gpj0-2, DOWN, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_peric { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_peric>; |
| |
| initial_peric: initial-state { |
| PIN(INPUT, gpv7-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpv7-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpv7-2, NONE, FAST_SR1); |
| PIN(INPUT, gpv7-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpv7-4, DOWN, FAST_SR1); |
| PIN(INPUT, gpv7-5, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpb0-4, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpc0-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpc0-5, DOWN, FAST_SR1); |
| PIN(INPUT, gpc0-7, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpc1-1, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpc3-4, NONE, FAST_SR1); |
| PIN(INPUT, gpc3-5, NONE, FAST_SR1); |
| PIN(INPUT, gpc3-6, NONE, FAST_SR1); |
| PIN(INPUT, gpc3-7, NONE, FAST_SR1); |
| |
| PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); |
| PIN(2, gpg0-1, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpd2-5, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpd4-0, NONE, FAST_SR1); |
| PIN(INPUT, gpd4-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpd4-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpd4-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpd4-4, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpd6-3, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpd8-1, UP, FAST_SR1); |
| |
| PIN(INPUT, gpg1-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpg1-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpg1-2, DOWN, FAST_SR1); |
| PIN(INPUT, gpg1-3, DOWN, FAST_SR1); |
| PIN(INPUT, gpg1-4, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpg2-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpg2-1, DOWN, FAST_SR1); |
| |
| PIN(INPUT, gpg3-0, DOWN, FAST_SR1); |
| PIN(INPUT, gpg3-1, DOWN, FAST_SR1); |
| PIN(INPUT, gpg3-5, DOWN, FAST_SR1); |
| }; |
| }; |
| |
| &pinctrl_touch { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&initial_touch>; |
| |
| initial_touch: initial-state { |
| PIN(INPUT, gpj1-2, DOWN, FAST_SR1); |
| }; |
| }; |
| |
| &pwm { |
| pinctrl-0 = <&pwm0_out>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &mic { |
| status = "okay"; |
| }; |
| |
| &pmu_system_controller { |
| assigned-clocks = <&pmu_system_controller 0>; |
| assigned-clock-parents = <&xxti>; |
| }; |
| |
| &serial_1 { |
| status = "okay"; |
| }; |
| |
| &serial_3 { |
| status = "okay"; |
| |
| bluetooth { |
| compatible = "brcm,bcm43438-bt"; |
| max-speed = <3000000>; |
| shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>; |
| device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>; |
| host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>; |
| clocks = <&s2mps13_osc S2MPS11_CLK_BT>; |
| clock-names = "extclk"; |
| }; |
| }; |
| |
| &spi_1 { |
| cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; |
| status = "okay"; |
| |
| wm5110: audio-codec@0 { |
| compatible = "wlf,wm5110"; |
| reg = <0x0>; |
| spi-max-frequency = <20000000>; |
| interrupt-parent = <&gpa0>; |
| interrupts = <4 IRQ_TYPE_NONE>; |
| clocks = <&pmu_system_controller 0>, |
| <&s2mps13_osc S2MPS11_CLK_BT>; |
| clock-names = "mclk1", "mclk2"; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| wlf,micd-detect-debounce = <300>; |
| wlf,micd-bias-start-time = <0x1>; |
| wlf,micd-rate = <0x7>; |
| wlf,micd-dbtime = <0x1>; |
| wlf,micd-force-micbias; |
| wlf,micd-configs = <0x0 1 0>; |
| wlf,hpdet-channel = <1>; |
| wlf,gpsw = <0x1>; |
| wlf,inmode = <2 0 2 0>; |
| |
| wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; |
| wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; |
| |
| /* core supplies */ |
| AVDD-supply = <&ldo18_reg>; |
| DBVDD1-supply = <&ldo18_reg>; |
| CPVDD-supply = <&ldo18_reg>; |
| DBVDD2-supply = <&ldo18_reg>; |
| DBVDD3-supply = <&ldo18_reg>; |
| |
| controller-data { |
| samsung,spi-feedback-delay = <0>; |
| }; |
| }; |
| }; |
| |
| &spi_3 { |
| status = "okay"; |
| no-cs-readback; |
| |
| irled@0 { |
| compatible = "ir-spi-led"; |
| reg = <0x0>; |
| spi-max-frequency = <5000000>; |
| power-supply = <&irda_regulator>; |
| duty-cycle = <60>; |
| led-active-low; |
| |
| controller-data { |
| samsung,spi-feedback-delay = <0>; |
| }; |
| }; |
| }; |
| |
| &timer { |
| clock-frequency = <24000000>; |
| }; |
| |
| &tmu_atlas0 { |
| vtmu-supply = <&ldo3_reg>; |
| status = "okay"; |
| }; |
| |
| &tmu_apollo { |
| vtmu-supply = <&ldo3_reg>; |
| status = "okay"; |
| }; |
| |
| &tmu_g3d { |
| vtmu-supply = <&ldo3_reg>; |
| status = "okay"; |
| }; |
| |
| &usbdrd30 { |
| vdd33-supply = <&ldo10_reg>; |
| vdd10-supply = <&ldo6_reg>; |
| status = "okay"; |
| }; |
| |
| &usbdrd_dwc3 { |
| dr_mode = "otg"; |
| }; |
| |
| &usbdrd30_phy { |
| vbus-supply = <&safeout1_reg>; |
| status = "okay"; |
| |
| port { |
| usb_to_muic: endpoint { |
| remote-endpoint = <&muic_to_usb>; |
| }; |
| }; |
| }; |
| |
| &xxti { |
| clock-frequency = <24000000>; |
| }; |
