| * AC timing parameters of LPDDR3 memories for a given speed-bin. |
| |
| The structures are based on LPDDR2 and extended where needed. |
| |
| Required properties: |
| - compatible : Should be "jedec,lpddr3-timings" |
| - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32> |
| - reg : maximum DDR clock frequency for the speed-bin. Type is <u32> |
| |
| Optional properties: |
| |
| The following properties represent AC timing parameters from the memory |
| data-sheet of the device for a given speed-bin. All these properties are |
| of type <u32> and the default unit is ps (pico seconds). |
| - tRFC |
| - tRRD |
| - tRPab |
| - tRPpb |
| - tRCD |
| - tRC |
| - tRAS |
| - tWTR |
| - tWR |
| - tRTP |
| - tW2W-C2C |
| - tR2R-C2C |
| - tFAW |
| - tXSR |
| - tXP |
| - tCKE |
| - tCKESR |
| - tMRD |
| |
| Example: |
| |
| timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { |
| compatible = "jedec,lpddr3-timings"; |
| reg = <800000000>; /* workaround: it shows max-freq */ |
| min-freq = <100000000>; |
| tRFC = <65000>; |
| tRRD = <6000>; |
| tRPab = <12000>; |
| tRPpb = <12000>; |
| tRCD = <10000>; |
| tRC = <33750>; |
| tRAS = <23000>; |
| tWTR = <3750>; |
| tWR = <7500>; |
| tRTP = <3750>; |
| tW2W-C2C = <0>; |
| tR2R-C2C = <0>; |
| tFAW = <25000>; |
| tXSR = <70000>; |
| tXP = <3750>; |
| tCKE = <3750>; |
| tCKESR = <3750>; |
| tMRD = <7000>; |
| }; |
