| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Renesas R-Car DWC HDMI TX Encoder |
| |
| maintainers: |
| - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| |
| description: | |
| The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP |
| with a companion PHY IP. |
| |
| allOf: |
| - $ref: synopsys,dw-hdmi.yaml# |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX |
| - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX |
| - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX |
| - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX |
| - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX |
| - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX |
| - renesas,r8a77965-hdmi # for R-Car M3-N compatible HDMI TX |
| - const: renesas,rcar-gen3-hdmi |
| |
| reg-io-width: |
| const: 1 |
| |
| clocks: |
| maxItems: 2 |
| |
| clock-names: |
| maxItems: 2 |
| |
| ports: |
| $ref: /schemas/graph.yaml#/properties/ports |
| |
| properties: |
| port@0: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: Parallel RGB input port |
| |
| port@1: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: HDMI output port |
| |
| port@2: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: Sound input port |
| |
| required: |
| - port@0 |
| - port@1 |
| - port@2 |
| |
| power-domains: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - interrupts |
| - ports |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/power/r8a7795-sysc.h> |
| |
| hdmi@fead0000 { |
| compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; |
| reg = <0xfead0000 0x10000>; |
| interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; |
| clock-names = "iahb", "isfr"; |
| power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| port@0 { |
| reg = <0>; |
| dw_hdmi0_in: endpoint { |
| remote-endpoint = <&du_out_hdmi0>; |
| }; |
| }; |
| port@1 { |
| reg = <1>; |
| rcar_dw_hdmi0_out: endpoint { |
| remote-endpoint = <&hdmi0_con>; |
| }; |
| }; |
| port@2 { |
| reg = <2>; |
| rcar_dw_hdmi0_sound_in: endpoint { |
| remote-endpoint = <&hdmi_sound_out>; |
| }; |
| }; |
| }; |
| }; |
| |
| hdmi0-out { |
| compatible = "hdmi-connector"; |
| label = "HDMI0 OUT"; |
| type = "a"; |
| |
| port { |
| hdmi0_con: endpoint { |
| remote-endpoint = <&rcar_dw_hdmi0_out>; |
| }; |
| }; |
| }; |
| |
| ... |
