| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| # Copyright 2019 Texas Instruments Incorporated |
| %YAML 1.2 |
| --- |
| $id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#" |
| $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| |
| title: Texas Instruments K2G Display Subsystem |
| |
| maintainers: |
| - Jyri Sarha <jsarha@ti.com> |
| - Tomi Valkeinen <tomi.valkeinen@ti.com> |
| |
| description: | |
| The K2G DSS is an ultra-light version of TI Keystone Display |
| SubSystem. It has only one output port and video plane. The |
| output is DPI. |
| |
| properties: |
| compatible: |
| const: ti,k2g-dss |
| |
| reg: |
| items: |
| - description: cfg DSS top level |
| - description: common DISPC common |
| - description: VID1 video plane 1 |
| - description: OVR1 overlay manager for vp1 |
| - description: VP1 video port 1 |
| |
| reg-names: |
| items: |
| - const: cfg |
| - const: common |
| - const: vid1 |
| - const: ovr1 |
| - const: vp1 |
| |
| clocks: |
| items: |
| - description: fck DSS functional clock |
| - description: vp1 Video Port 1 pixel clock |
| |
| clock-names: |
| items: |
| - const: fck |
| - const: vp1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| power-domains: |
| maxItems: 1 |
| description: phandle to the associated power domain |
| |
| port: |
| $ref: /schemas/graph.yaml#/properties/port |
| description: |
| The DSS DPI output port node |
| |
| max-memory-bandwidth: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| Input memory (from main memory to dispc) bandwidth limit in |
| bytes per second |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - clocks |
| - clock-names |
| - interrupts |
| - port |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| dss: dss@2540000 { |
| compatible = "ti,k2g-dss"; |
| reg = <0x02540000 0x400>, |
| <0x02550000 0x1000>, |
| <0x02557000 0x1000>, |
| <0x0255a800 0x100>, |
| <0x0255ac00 0x100>; |
| reg-names = "cfg", "common", "vid1", "ovr1", "vp1"; |
| clocks = <&k2g_clks 0x2 0>, |
| <&k2g_clks 0x2 1>; |
| clock-names = "fck", "vp1"; |
| interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>; |
| |
| power-domains = <&k2g_pds 0x2>; |
| |
| max-memory-bandwidth = <230000000>; |
| |
| port { |
| dpi_out: endpoint { |
| remote-endpoint = <&sii9022_in>; |
| }; |
| }; |
| }; |
