| # SPDX-License-Identifier: GPL-2.0 |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Rockchip rk3066 HDMI controller |
| |
| maintainers: |
| - Sandy Huang <hjc@rock-chips.com> |
| - Heiko Stuebner <heiko@sntech.de> |
| |
| properties: |
| compatible: |
| const: rockchip,rk3066-hdmi |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| const: hclk |
| |
| pinctrl-0: |
| maxItems: 2 |
| |
| pinctrl-names: |
| const: default |
| description: |
| Switch the iomux for the HPD/I2C pins to HDMI function. |
| |
| power-domains: |
| maxItems: 1 |
| |
| rockchip,grf: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: |
| This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. |
| |
| ports: |
| type: object |
| |
| properties: |
| "#address-cells": |
| const: 1 |
| |
| "#size-cells": |
| const: 0 |
| |
| port@0: |
| type: object |
| description: |
| Port node with two endpoints, numbered 0 and 1, |
| connected respectively to vop0 and vop1. |
| |
| port@1: |
| type: object |
| description: |
| Port node with one endpoint connected to a hdmi-connector node. |
| |
| required: |
| - "#address-cells" |
| - "#size-cells" |
| - port@0 |
| - port@1 |
| |
| additionalProperties: false |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| - pinctrl-0 |
| - pinctrl-names |
| - power-domains |
| - rockchip,grf |
| - ports |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/rk3066a-cru.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/pinctrl/rockchip.h> |
| #include <dt-bindings/power/rk3066-power.h> |
| hdmi: hdmi@10116000 { |
| compatible = "rockchip,rk3066-hdmi"; |
| reg = <0x10116000 0x2000>; |
| interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&cru HCLK_HDMI>; |
| clock-names = "hclk"; |
| pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; |
| pinctrl-names = "default"; |
| power-domains = <&power RK3066_PD_VIO>; |
| rockchip,grf = <&grf>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| hdmi_in: port@0 { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| hdmi_in_vop0: endpoint@0 { |
| reg = <0>; |
| remote-endpoint = <&vop0_out_hdmi>; |
| }; |
| hdmi_in_vop1: endpoint@1 { |
| reg = <1>; |
| remote-endpoint = <&vop1_out_hdmi>; |
| }; |
| }; |
| hdmi_out: port@1 { |
| reg = <1>; |
| hdmi_out_con: endpoint { |
| remote-endpoint = <&hdmi_con_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| pinctrl { |
| hdmi { |
| hdmi_hpd: hdmi-hpd { |
| rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; |
| }; |
| hdmii2c_xfer: hdmii2c-xfer { |
| rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, |
| <0 RK_PA2 1 &pcfg_pull_none>; |
| }; |
| }; |
| }; |