| // SPDX-License-Identifier: GPL-2.0-or-later |
| /* |
| * arch/arm/mach-imx/mm-imx21.c |
| * |
| * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) |
| */ |
| |
| #include <linux/mm.h> |
| #include <linux/init.h> |
| #include <linux/pinctrl/machine.h> |
| #include <asm/mach/map.h> |
| |
| #include "common.h" |
| #include "devices/devices-common.h" |
| #include "hardware.h" |
| #include "iomux-v1.h" |
| |
| /* MX21 memory map definition */ |
| static struct map_desc imx21_io_desc[] __initdata = { |
| /* |
| * this fixed mapping covers: |
| * - AIPI1 |
| * - AIPI2 |
| * - AITC |
| * - ROM Patch |
| * - and some reserved space |
| */ |
| imx_map_entry(MX21, AIPI, MT_DEVICE), |
| /* |
| * this fixed mapping covers: |
| * - CSI |
| * - ATA |
| */ |
| imx_map_entry(MX21, SAHB1, MT_DEVICE), |
| /* |
| * this fixed mapping covers: |
| * - EMI |
| */ |
| imx_map_entry(MX21, X_MEMC, MT_DEVICE), |
| }; |
| |
| /* |
| * Initialize the memory map. It is called during the |
| * system startup to create static physical to virtual |
| * memory map for the IO modules. |
| */ |
| void __init mx21_map_io(void) |
| { |
| iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc)); |
| } |
| |
| void __init imx21_init_early(void) |
| { |
| mxc_set_cpu_type(MXC_CPU_MX21); |
| imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR), |
| MX21_NUM_GPIO_PORT); |
| } |
| |
| void __init mx21_init_irq(void) |
| { |
| mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); |
| } |
| |
| static const struct resource imx21_audmux_res[] __initconst = { |
| DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K), |
| }; |
| |
| void __init imx21_soc_init(void) |
| { |
| mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR)); |
| mxc_device_init(); |
| |
| mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| |
| pinctrl_provide_dummies(); |
| imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, MX21_INT_DMACH0); |
| platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, |
| ARRAY_SIZE(imx21_audmux_res)); |
| } |